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ZIOL2201 Datasheet(PDF) 24 Page - Renesas Technology Corp

No. de pieza ZIOL2201
Descripción Electrónicos  IO-Link Compliant HV Line Driver IC Family
PDF  92 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
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ZIOL2201 Datasheet(HTML) 24 Page - Renesas Technology Corp

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ZIOL2xxx Datasheet
© 2016 Integrated Device Technology, Inc.
24
April 26, 2016
independently. If at least one of both events appears for a specific time, the incident will be regarded as WURQ
request from master side and the IC will generate an internal exception (issue an interrupt) in order to signal this
to the interconnected µC. Besides the configurable signaling on the INT_L pin (refer to chapter 3.3.10.1) this
special exception will be displayed on the therefore dedicated WURQ_L pin. Details of the signaling via the
WURQ_L and/or the INT_L pin and the pin driver configuration of the WURQ_L pin can be defined in the
configuration registers which are described in detail in chapter 3.3.9.
The logic level of the WURQ_L pin (a wake-up causes logic low) or the stored WURQ event will be reset as soon
as the drivers direction is set to input (TX_EN=0), which equals the WURQ acknowledge from the IO-Link device
side.
The on logic level based WURQ detection works only for level-changes which are driven by the master. That
means a WURQ will not be detected if a level change has been initiated by the device itself, even if the signal
timing is equivalent to a WURQ event. This prevents the in SIO mode operating IO-Link device to misinterpret the
situation caused for instance by capacitive loads.
If the ZIOL2xxx operates in master mode (physical interface for IO-Link master port) and a Wake-Up pulse
(WURQ) shall be issued, the µC has to control the required driver strength by activating both channels (via
COM_EN and AUX_EN, refer to Figure 3.5) and has to provide the correct timing.
Figure 3.7
Wake-Up Signal Recognition
twurqL
0
68
75
80
85
94
µs
-10%
+10%
60
110
Accepted Wake-Up pulse width range if
OSC runs at lowest possible frequency
Accepted pulse width range if
OSC runs at highest possible frequency
Overdriven Output
Overdriven
Output
twurqU
Pulse
Width
Accepted Wake-Up
pulse width range (device)
-10%
+10%
Tolerance range due
tolerant OSC frequency
- 6 / + 25 clocks
MIN: Wake-Up pulse width
MAX: Wake-Up pulse width
The WURQ pulse recognition of the ZIOL2xxx in device mode is – in contrast to that – based on a time base
derived from the internal oscillator (OSC). Therefore the as WURQ recognized pulse width range of an received
Wake-Up signal is dependent on the frequency tolerance of the internal oscillator as illustrated in Figure 3.7. A
Wake-Up signal (pulse width according to the IO-Link Communication Specification, refer to chapter 8, [2]) shall
have a pulse width between 75µs and 85µs (variation 10µs). The ZIOL2xxx Wake-Up signal detection will always
recognize such a signal securely considering a frequency tolerance of the internal oscillator of ±10% (refer to
parameter fosc in Table 2.3).



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