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ZIOL2201 Datasheet(PDF) 56 Page - Renesas Technology Corp

No. de pieza ZIOL2201
Descripción Electrónicos  IO-Link Compliant HV Line Driver IC Family
PDF  92 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
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ZIOL2201 Datasheet(HTML) 56 Page - Renesas Technology Corp

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ZIOL2xxx Datasheet
© 2016 Integrated Device Technology, Inc.
56
April 26, 2016
The capability of the output driver of the DC/DC converter is limited to 200mA (refer to parameter IPK in Table 2.3).
Operating at this limit must be limited in time. Since the DC/DC is not shut down when the die-temperature
exceeds the configured limit, the application circuit hardware and software design must make sure that no IC
damage can occur.
In the start-up phase of the IC (power-on-reset) the DC/DC converter control moves to a soft-start regime which
limits the current that charges the capacitor at the VOUT voltage. This is done by increasing the reference voltage
and thus the output voltage follows that reference in a controlled manner.
The DC_RDY pin provides information on the state of the output voltage. If the DC/DC converter is overloaded
(VOUT drops below 85% of the nominal value), DC_RDY is low. In addition to that DC_RDY is kept on logic low
level if the IC is in power-on-reset. In this power-on-reset case and only in this case the converter is restarted.
The rising edge of DC_RDY signal can be delayed by 50ms (+/- 5%). This delay function is configurable with bit 5
of the configuration-register IRQ_WURQ_CTRL[14] (refer to Figure 3.14). The IC manufacturer default value for
this bit is ‘1’ thus the delay function is enabled by default. If DC_RDY is low during re-configuration of the IC and
the delay is not yet finished, it stays low. The falling edge of the DC_RDY signal will not be delayed thus is not
affected by bit 5 of the configuration-register IRQ_WURQ_CTRL[14].
3.6.3.
Dimensioning of external Devices
The output capacitor C1 acts as filter capacitor. It has to have low equal series resistance (ESR) thus a ceramic
capacitor with a 10µF capacitance has to be chosen. The ESR has influence on the output ripple. The higher the
ESR the higher is the output ripple. The self-resonant frequency of the capacitor shall be as high as possible. It is
possible to have a 100nF block capacitor (C2) in parallel to C1 to increase its frequency behaviour.
The Schottky diode acts as freewheeling diode. Therefore, it shall have a low voltage drop to increase efficiency.
A low parasitic capacity or a fast reverse recovery time increase the efficiency by preventing a large shoot-through
current through the output transistor and the diode when switching on the transistor.
The voltage divider provides the feedback voltage for the DC/DC converter. R2 shall be ~10k
Ω. R1 can be
calculated by


=
1
225
,
1
,
2
1
V
V
R
R
set
OUT
.
The tolerance of the resistors affect the tolerance of the output voltage thus resistors with 1% tolerance are
preferred. Figure 3.22 illustrates the DC/DC converter output voltage (including its tolerance range) as function of
R1 for R2 = 10kOhms.
Table 3.9
Examples for the resistors R1 and R2 using E96 resistor series
VOUT,set
R1
R2
3.3V
18.2k
Ω
10.5 k
Ω
5V
38.3 k
Ω
12.4 k
Ω



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