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AS1160/AS1161

Datasheet - A p p l i c a t i o n I n f o r m a t i o n

PCB Considerations

The serializer and deserializer should be placed as close to the PCB edge connector as possible. In multiple deserial-

izer applications, the distance from the deserializer to the slot connector appears as a stub to the serializer driving the

backplane traces. Longer stubs lower the impedance of the bus, increase the load on the serializer and lower the

threshold margin at the deserializers. Deserializer devices should be placed much less than one inch from slot connec-

tors. Because transition times are very fast on the serializer bus LVDS outputs, reducing stub lengths as much as pos-

sible is the best method to ensure signal integrity.

For bus LVDS applications the LVTTL, LVCMOS and bus LVDS signals should be separated from each other to pre-

vent coupling into the bus lines. This can be achieved by using a four-layer PCB where the power, ground and input/

output signals are separated.

Transmission Media

The transmission line characteristics affect the performance of the AS1160/AS1161. It’s recommended to use con-

trolled-impedance media and to terminate at both ends of the transmission line (see Figure 37). Twisted pair cables

should be used due to their superior signal quality and the less EMI generation. Noise which is picked up as common

mode in the twisted pair is rejected by the differential receiver.

It’s important to eliminate reflections and to run the differential traces as close together as possible to ensure that the

noise is coupled as common mode. Also take care of matching the electrical length of the traces to prevent a degrada-

tion of the magnetic field cancellation. To avoid an external magnetic field, the differential output signals should also be

placed as close together as possible.

The potential of offsetting the ground levels of the serializer vs. the deserializer must be considered. The bus LVDS

provides a +1.2V common mode range at the receiver inputs.

Figure 37. Double-Terminated Point-to-Point

The serializer/deserializer chipset can be used in many different topologies. Such as multidrop configurations (see Fig-

ure 35 on page 20), through a PCB trace or through twisted pair cable (see Figure 37).

In point-to-point configurations, it’s possible to terminated the transmission line only once at the receiver end. With only

one termination the reflections and the differential signal swing are larger compared to a double termination.

Parallel

Data Out

Parallel

Data In

Serialized Data

56

Ω

56

Ω

AS1160

AS1161

Strip Line or Twisted Pair

Z = 28

Ω

DO-

DO+

RI-

RI+

10-bit

10-bit