AD9882SLASHPCB datasheet(5/36 Pages) AD

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REV. A

AD9882

–5–

Test

AD9882KST

Parameter

Conditions

Temp

Level

Min

Typ

Max

Unit

AC SPECIFICATIONS

Intra-Pair (+ to –) Differential

Input Skew (TDPS)

Full

360

Channel-to-Channel Differential

Full

Clock

Input Skew (TCCS)

Period

Low-to-High Transition Time

for Data (DLHT)Output Drive = High,

CL = 10 pF

Full

2.2

Output Drive = Med,

CL = 7 pF

Full

2.5

Output Drive = Low,

CL = 5 pF

Full

3.2

Low-to-High Transition Time for

DATACK (DLHT)Output Drive = High,

CL = 10 pF

Full

1.0

Output Drive = Med,

CL = 7 pF

Full

1.6

Output Drive = Low,

CL = 5 pF

Full

2.1

High-to-Low Transition Time for

Data (DHLT)Output Drive = High,

CL = 10 pF

Full

2.2

Output Drive = Med,

CL = 7 pF

Full

1.9

Output Drive = Low,

CL = 5 pF

Full

1.7

High-to-Low Transition Time for

DATACK (DHLT)Output Drive = High,

CL = 10 pF

Full

1.0

Output Drive = Med,

CL = 7 pF

Full

1.0

Output Drive = Low,

CL = 5 pF

Full

1.4

Data-to-Clock Skew

Full

–0.5

+2.0

Duty Cycle, DATACK

Full

DATACK Frequency (FCIP)

Full

112

MHz

NOTES

1The typical pattern contains a grayscale area, Output Drive = High.

2DATACK Load = 10 pF, Data Load = 10 pF.

3The worst-case pattern contains a black and white checkerboard pattern, Output Drive = High.

4DRIVE STRENGTH = 11

Specifications subject to change without notice.

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