AD9882SLASHPCB datasheet(19/36 Pages) AD

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REV. A

AD9882

–19–

Table VIII. Digital Interface Pin List

Pin Type

Mnemonic

Function

Value

Pin Number

Digital Video

RX0+

Digital Input Channel 0 True

Data Inputs

RX0–

Digital Input Channel 0 Complement

RX1+

Digital Input Channel 1 True

RX1–

Digital Input Channel 1 Complement

RX2+

Digital Input Channel 2 True

RX2–

Digital Input Channel 2 Complement

Digital Video

RXC+

Digital Data Clock True

Clock Inputs

RXC–

Digital Data Clock Complement

Termination

RTERM

Control Pin for Setting the Internal Termination

Control

Resistance

Outputs

Data Enable

3.3 V CMOS

HSOUT

Hsync Output

3.3 V CMOS

VSOUT

Vsync Output

3.3 V CMOS

CTL0, CTL1,

Decoded Control Bit Outputs

3.3 V CMOS

22–25

CTL2, CTL3

HDCP

DDCSCL

HDCP Slave Serial Port Data Clock

3.3 V CMOS

DDCSDA

HDCP Slave Serial Port Data I/O

3.3 V CMOS

MCL

HDCP Master Serial Port Data Clock

3.3 V CMOS

MDA

HDCP Master Serial Port Data I/O

3.3 V CMOS

Power Supply

Main Power Supply

3.15 V to 3.45 V

PVD

PLL Power Supply

3.15 V to 3.45 V

VDD

Output Power Supply

2.2 V to 3.6 V

GND

Ground Supply

0 V

DIGITAL INTERFACE PIN DESCRIPTIONS

DIGITAL DATA INPUTS

RX0+

Positive Differential Input Data (Channel 0)

RX0–

Negative Differential Input Data (Channel 0)

RX1+

Positive Differential Input Data (Channel 1)

RX1–

Negative Differential Input Data (Channel 1)

RX2+

Positive Differential Input Data (Channel 2)

RX2–

Negative Differential Input Data (Channel 2)

These six pins receive three pairs of differential, low voltage swing input pixel

data from a DVI transmitter.

DIGITAL CLOCK INPUTS

RXC+

Positive Differential Input Clock

RXC–

Negative Differential Input Clock

These two pins receive the differential, low voltage swing input pixel clock from

a DVI transmitter.

TERMINATION CONTROL

RTERM

Internal Termination Set Pin

This pin is used to set the termination resistance

for all of the digital interface high speed inputs.

To set, place a resistor of value equal to 10

¥ the

desired input termination resistance between this

pin (Pin 28) and ground supply. Typically, the

value of this resistor should be 500

OUTPUTS

Data Enable Output

This pin outputs the state of data enable (DE).

The AD9882 decodes DE from the incoming

stream of data. The DE signal will be HIGH

during active video and will be LOW while there

is no active video.

DDCSCL

HDCP Slave Serial Port Data Clock

For use in communicating with the HDCP

enabled DVI transmitter.

DDCSDA

HDCP Slave Serial Port I/O

For use in communicating with the HDCP

enabled DVI transmitter.

MCL

HDCP Master Serial Port Data Clock

Connects to the EEPROM for reading the

encrypted HDCP keys.

MDA

HDCP Master Serial Port Data I/O

Connects to the EEPROM for reading the

encrypted HDCP keys.

CTL

Digital Control Outputs

These pins output the control signals for the

Red and Green channels. CTL0 and CTL1

correspond to the Red channel’s input, while

CTL2 and CTL3 correspond to the Green

channel’s input.

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