AD9882SLASHPCB datasheet(16/36 Pages) AD

16 / 36 page

REV. A

–16–

AD9882

Table V. VCO Frequency Ranges

PV1

PV0

Pixel Clock Range (MHz)

0012–41

0141–82

1082–140

3. The 3-bit Charge Pump Current Register (Register 03H,

Bits 3–5). This register allows the current that drives the

low-pass loop filter to be varied. The possible current values

are listed in Table VI.

Table VI. Charge Pump Current/Control Bits

Ip2

Ip1

Ip0

Current (

mA)

000

001

100

010

150

011

250

100

350

101

500

110

750

111

1500

4. The 5-bit Phase Adjust Register (Register 04H, Bits 3–7).

The phase of the generated sampling clock may be shifted to

locate an optimum sampling point within a clock cycle. The

Phase Adjust Register provides 32 phase-shift steps of 11.25

∞

each. The Hsync signal with an identical phase shift is available

through the HSOUT pin.

The PLL characteristics are determined by the loop filter design,

the PLL charge pump current, and the VCO range setting.

The loop filter design is illustrated in Figure 6. Recommended

settings of VCO range and charge pump current for VESA

standard display modes are listed in Table VII.

PVD

0.082 F

2.74k

0.0082 F

FILT

Figure 6. PLL Loop Filter Detail

Four programmable registers are provided to optimize the

performance of the PLL. These registers are:

1. The 12-bit Divisor Register (Registers 01H and 02H). The

input Hsync frequencies range from 15 kHz to 110 kHz. The

PLL multiplies the frequency of the Hsync signal, producing

pixel clock frequencies in the range of 12 MHz to 140 MHz.

The Divisor Register controls the exact multiplication factor.

This register may be set to any value between 221 and 4095.

(The divide ratio that is actually used is the programmed

divide ratio plus one.)

2. The 2-bit VCO Range Register (Register 03H, Bits 6 and 7).

To improve the noise performance of the AD9882, the VCO

operating frequency range is divided into three overlapping

regions. The VCO Range register sets this operating range.

The frequency ranges for the lowest and highest regions are

shown in Table V.

Table VII. Recommended VCO Range and Charge Pump Current Settings for Standard Display Formats

Refresh

Horizontal

Standard

Resolution

Rate (Hz)

Frequency (kHz)

Pixel Rate (MHz)

VCORNGE

CURRENT

VGA

640

¥ 480

31.5

25.175

101

37.7

31.500

101

37.5

31.500

101

43.3

36.000

110

SVGA

800

¥ 600

35.1

36.000

101

37.9

40.000

110

48.1

50.000

101

46.9

49.500

101

53.7

56.250

101

XGA

1024

¥ 768

48.4

65.000

101

56.5

75.000

110

60.0

78.750

110

64.0

85.500

101

68.3

94.500

101

SXGA

1280

¥ 1024

64.0

108.000

101

80.0

135.000

110

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