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CS89712 Datasheet(PDF) 14 Page - Cirrus Logic

No. de pieza CS89712
Descripción Electrónicos  HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER
PDF  170 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS89712 Datasheet(HTML) 14 Page - Cirrus Logic

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CS89712
14
DS502PP2
net Port register (or set of Ethernet Port registers in
some cases) with an initial non-default value.
2.6.3.2
Reset Configuration Block Header
The header (first word of the block located at EE-
PROM address 00h) specifies the type of EE-
PROM used, if a Reset Configuration block is
present, and if so, how many bytes of configuration
data are stored in the Reset Configuration Block.
2.6.3.3
Determining the EEPROM Type
The LSB of the high byte of the header indicates
the type of EEPROM attached: sequential or non-
sequential. An LSB of 0 (XXXX-XXX0) indicates
a sequential EEPROM, with a 1 (XXXX-XXX1)
indicating non-sequential EEPROM. The Ethernet
port functions with either type of EEPROM. The
Ethernet port will automatically generate sequen-
tial addresses while reading the Reset Configura-
tion Block if a non-sequential EEPROM is used.
2.6.3.4
EEPROM Reset Configuration Block
The read-out of either a binary 101X-XXX0 or
101X-XXX1 from the high byte of the header indi-
cates the presence of configuration data. Any other
readout value terminates initialization from the EE-
PROM. If an EEPROM is attached but not used for
configuration, the high byte of the first word should
be programmed with 00h in order to ensure that the
Ethernet port will not attempt to read configuration
data from the EEPROM.
2.6.3.5
Determining Number of Bytes in the
Reset Configuration Block
The low byte of the Reset Configuration Block
header is known as the link byte. The value of the
Link Byte represents the number of bytes of config-
uration data in the Reset Configuration Block. The
two bytes used for the header are excluded when
calculating the Link Byte value.
For example, a Reset Configuration Block header
of A104h indicates a non-sequential EEPROM pro-
grammed with a Reset Configuration Block con-
taining 4 bytes of configuration data. This Reset
Configuration Block occupies 6 bytes (3 words) of
EEPROM space (2 bytes for the header and 4 bytes
of configuration data).
2.6.4
Groups of Configuration Data
Configuration data is arranged as groups of words.
Each group contains one or more words of data that
are to be loaded into Ethernet Port registers. The
first word of each group is referred to as the Group
Header. The Group Header indicates the number of
words in the group and the address of the Ethernet
Port register where the first data word in the group
is to be loaded. Any remaining words in the group
are stored in successive Ethernet Port registers.
2.6.4.1
Group Header
Bits F through C of the Group Header specify the
number of words in each group that are to be trans-
ferred to Ethernet Port registers (see Figure 3 for
the format). This value is two less than the total
number of words in the group, including the Group
Header. For example, if bits F through C contain
0001, there are three words in the group (a Group
Header and two words of configuration data).
Bits 8 through 0 of the Group Header specify a 9-
bit Ethernet Port Address. This address defines the
Ethernet Port register that will be loaded with the
first word of configuration data from the group.
Bits B though 9 of the Group Header are forced to
0, restricting the destination address range to the
first 512 bytes of Ethernet Port memory.
2.6.5
Reset Configuration Block Checksum
A checksum is stored in the high byte position of
the word immediately following the last group of
data in the Reset Configuration Block. (The EE-
PROM address of the checksum value can be deter-
mined by dividing the value stored in the Link Byte
by two.) The checksum value is the 2’s comple-
ment of the 8-bit sum (any carry out of eighth bit is



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