STM32F302XD datasheet(16/168 Pages) STMICROELECTRONICS

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Functional overview

STM32F302xD STM32F302xE

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DocID026900 Rev 4

3.4

Embedded SRAM

STM32F302xD/E devices feature 64 Kbyte of embedded SRAM with hardware parity check

implemented on the first 32 Kbyte. The memory can be accessed in read/write at CPU clock

speed with 0 wait states.

3.5

Boot modes

At startup, Boot0 pin and Boot1 option bit are used to select one of three boot options:

•

Boot from user Flash

•

Boot from system memory

•

Boot from embedded SRAM

The boot loader is located in the system memory. It is used to reprogram the Flash memory

by using USART1 (PA9/PA10), USART2 (PA2/PA3) or USB (PA11/PA12) through DFU

(device firmware upgrade).

3.6

Cyclic redundancy check (CRC)

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at

linktime and stored at a given memory location.

STM32F302XD Datasheet(PDF) 16 Page - STMicroelectronics