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STM32F302XD Datasheet(PDF) 22 Page - STMicroelectronics |
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STM32F302XD Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 168 page ![]() Functional overview STM32F302xD STM32F302xE 22/168 DocID026900 Rev 4 effective graphic applications using LCD modules with embedded controllers or high performance solutions using external controllers with dedicated acceleration. 3.13 Interrupts and events 3.13.1 Nested vectored interrupt controller (NVIC) The STM32F302xD/E devices embed a nested vectored interrupt controller (NVIC) able to handle up to 73 maskable interrupt channels and 16 priority levels. The NVIC benefits are the following: • Closely coupled NVIC gives low latency interrupt processing • Interrupt entry vector table address passed directly to the core • Closely coupled NVIC core interface • Allows early processing of interrupts • Processing of late arriving higher priority interrupts • Support for tail chaining • Processor state automatically saved • Interrupt entry restored on interrupt exit with no instruction overhead The NVIC hardware block provides flexible interrupt management features with minimal interrupt latency. 3.14 Fast analog-to-digital converter (ADC) Two fast analog-to-digital converters 5 MSPS, with selectable resolution between 12 and 6 bit, are embedded in the STM32F302xD/E family devices. The ADCs have up to 18 external channels. The ADCs can perform conversions in single-shot or scan modes. In scan mode, automatic conversion is performed on a selected group of analog inputs. The ADCs have also internal channels: Temperature sensor connected to ADC1 channel 16, VBAT/2 connected to ADC1 channel 17, Voltage reference VREFINT connected to the 2 ADCs channel 18, VREFOPAMP1 connected to ADC1 channel 15, VREFOPAMP2 connected to ADC2 channel 17. Additional logic functions embedded in the ADC interface allow: • Simultaneous sample and hold • Interleaved sample and hold • Single-shunt phase current reading techniques. The ADC can be served by the DMA controller. Three analog watchdogs are available per ADC. The analog watchdog feature allows very precise monitoring of the converted voltage of one, some or all selected channels. An interrupt is generated when the converted voltage is outside the programmed thresholds. The events generated by the general-purpose timers and the advanced-control timer (TIM1) can be internally connected to the ADC start trigger and injection trigger, respectively, to allow the application to synchronize A/D conversion and timers. |
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