AD9396SLASHPCB datasheet(38/48 Pages) AD

38 / 48 page

AD9396

Rev. 0 | Page 38 of 48

0x44—Bits[7:0] CSC B4 LSBs

0x45—Bits[4:0] CSC C1 MSBs

The default value for the 13-bit C1 is 0x0000.

0x46—Bits[7:0 CSC C1 LSBs

0x47—Bits[4:0 CSC C2 MSBs

The default value for the 13-bit C2 is 0x0800.

0x48—Bits[7:0] CSC C2 LSBs

0x49—Bits[4:0] CSC C3 MSBs

The default value for the 13-bit C3 is 0x0E87.

0x4A—Bits[7:0] CSC C3 LSBs

0x4B—Bits[4:0] CSC C4 MSBs

The default value for the 13-bit C4 is 0x18BD.

0x4C—Bits[7:0] CSC C4 LSBs

0x59—Bit[6] MDA/MCL PU Disable

This bit disables the inter MDA/MCL pull-ups.

0x59—Bit[5] CLK Term O/R

This bit allows for overriding during power down.

0 = auto, 1 = manual.

0x59—Bit[4] Manual CLK Term

This bit allows normal clock termination or disconnects it. 0 =

normal, 1 = disconnected.

0x59—Bit[2] FIFO Reset UF

This bit resets the audio FIFO if underflow is detected.

0x59—Bit[1] FIFO Reset OF

This bit resets the audio FIFO if overflow is detected.

0x59—Bit[0] MDA/MCL Three-State

This bit three-states the MDA/MCL lines to allow in-circuit

programming of the EEPROM.

AD9396/PCB Datasheet(PDF) 38 Page - Analog Devices