AD9396SLASHPCB datasheet(25/48 Pages) AD

25 / 48 page

AD9396

Rev. 0 | Page 25 of 48

Hex

Address

Read/Write

or Read Only

Bits

Default

Value

Description

[3:2]

****00**

Output Mode

Selects which pins the data comes out on.

00 = 4:4:4 mode (normal).

01 = 4:2:2 + DDR 4:2:2 on blue.

10 = DDR 4:4:4 + DDR 4:2:2 on blue.

[1]

******1*

Primary Output

Enable

Enables primary output.

[0]

*******0

Secondary

Output Enable

Enables secondary output (DDR 4:2:2 in Output Mode 1 and

Mode 2).

0x26

Read/Write

[7]

0*******

Output Three-

State

Three-states the outputs.

[6]

*0******

SOG Three-State

Three-states the SOG output.

[3]

****1***

Power-Down Pin

Polarity

Sets polarity of power-down pin.

0 = active low.

1 = active high.

Selects the function of the power-down pin.

[2:1]

*****00*

Power-Down Pin

Function

00 = power-down.

01 = power-down and three-state SOG.

10 = three-state outputs only.

11 = three-state outputs and SOG.

[0]

*******0

Power-Down

0 = normal.

1 = power-down.

0x27

Read/Write

[7]

1*******

Auto Power-

Down Enable

0 = disable auto low power state.

1 = enable auto low power state.

[6]

*0******

HDCP A0

Sets the LSB of the address of the HDCP I2C. Set to 1 only for a

second receiver in a dual-link configuration.

0 = use internally generated MCLK.

1 = use external MCLK input.

[4]

***0****

BT656 EN

Enables EAV/SAV codes to be inserted into the video output data.

[3]

****0***

Force DE

Generation

Allows use of the internal DE generator in DVI mode.

[2:0]

*****000

Interlace Offset

Sets the difference (in HSYNCs) in field length between Field 0 and

Field 1.

0x28

Read/Write

[7:2]

011000**

VS Delay

Sets the delay (in lines) from VSYNC leading edge to the start of

active video.

[1:0]

******01

HS Delay MSB

MSB, Register 0x29.

0x29

Read/Write

[7:0]

00000100

HS Delay

Sets the delay (in pixels) from HSYNC leading edge to the start of

active video.

0x2A

Read/Write

[3:0]

****0101

Line Width MSB

MSB, Register 0x2B.

0x2B

Read/Write

[7:0]

00000000

Line Width

Sets the width of the active video line (in pixels).

0x2C

Read/Write

[3:0]

****0010

Screen Height

MSB

MSB, Register 0x2D.

0x2D

Read/Write

[7:0]

11010000

Screen Height

Sets the height of the active screen (in lines).

0x2E

Read/Write

[7]

0*******

Test 1

Must be written to 1 for proper operation.

0x2F

Read

[6]

*0******

TMDS Sync

Detect

Detects a TMDS DE.

[5]

**0*****

TMDS Active

Detects a TMDS clock.

[3]

****0***

HDCP Keys Read

Returns 1 when read of EEPROM keys is successful.

[2:0]

*****000

DVI Quality

Returns quality number based on DE edges.

AD9396/PCB Datasheet(PDF) 25 Page - Analog Devices

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