AD9551

Rev. B | Page 4 of 40

SPECIFICATIONS

Minimum and maximum values apply for full range of supply voltage and operating temperature variation. Typical values apply for VDD = 3.3 V,

REFERENCE CLOCK INPUT CHARACTERISTICS

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

FREQUENCY RANGE

191

806

MHz

INPUT CAPACITANCE

3

pF

INPUT RESISTANCE

6

kΩ

Measured single-ended

DUTY CYCLE

40

60

%

REFERENCE CLOCK INPUT VOLTAGE SWING

Measured with a differential probe across

the input pins

Differential

250

mV

Maximum magnitude across pin pair

Single-Ended

250

mV

Peak-to-peak

OUTPUT CHARACTERISTICS

Table 2.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LVPECL MODE

Differential Output Voltage Swing

690

765

889

mV

Output driver static

Common-Mode Output Voltage

VDD − 1.77

VDD − 1.66

VDD − 1.20

V

Output driver static

Frequency Range

0

900

MHz

Duty Cycle

40

60

%

Up to 805 MHz output frequency

Rise/Fall Time1 (20% to 80%)

255

305

ps

100 Ω termination between both pins of

the output driver

LVDS MODE

Differential Output Voltage Swing

247

454

mV

Voltage swing between output pins;

output driver static

25

mV

Absolute difference between voltage

swing of normal pin and inverted pin;

output driver static

Offset Voltage

1.125

1.375

V

Output driver static

25

mV

Voltage difference between output pins;

output driver static

Short-Circuit Output Current

17

24

mA

Frequency Range

0

900

MHz

Duty Cycle

40

60

%

Up to 805 MHz output frequency

Rise/Fall Time1 (20% to 80%)

285

355

ps

100 Ω termination between both pins of

the output driver

CMOS MODE

Output driver static; standard drive

strength setting

2.8

V

2.8

V

Output driver static; standard drive

strength setting

0.5

V

0.3

V

Frequency Range

0

200

MHz

3.3 V CMOS; standard drive strength

setting