AD9551SLASHPCBZ datasheet(39/40 Pages) AD

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AD9551

Rev. B | Page 39 of 40

OUT2 Driver Control (Register 0x34)

Table 35.

Address

Bit

Bit Name

Description

0x34

OUT2 drive strength

Controls the output drive capability of the OUT2 driver.

0 = weak.

1 = strong (default).

OUT2 power-down

Controls power-down functionality of the OUT2 driver.

0 = OUT2 active (default).

1 = OUT2 powered down.

[5:3]

OUT2 mode control

OUT2 driver mode selection.

000 = CMOS, both pins active.

001 = CMOS, positive pin active, negative pin tristate.

010 = CMOS, positive pin tristate, negative pin active.

011 = CMOS, both pins tristate.

100 = LVDS.

101 = LVPECL (default).

110 = not used.

111 = not used.

[2:1]

OUT2 CMOS polarity

Selects the polarity of the OUT2 pins in CMOS mode.

00 = positive pin logic is true = 1, false = 0/negative pin logic is true = 0, false = 1 (default).

01 = positive pin logic is true = 1, false = 0/negative pin logic is true = 1, false = 0.

10 = positive pin logic is true = 0, false = 1/negative pin logic is true = 0, false = 1.

11 = positive pin logic is true = 0, false = 1/negative pin logic is true = 1, false=0.

These bits are ineffective unless Bits[5:3] select CMOS mode.

Enable SPI control of OUT2

driver control

Controls OUT2 driver functionality.

0 = OUT2 is LVDS or LVPECL, per the OUTSEL pin (Pin 16) (default).

1 = OUT2 functionality defined by Bits[7:1].

AD9551/PCBZ Datasheet(PDF) 39 Page - Analog Devices