AD9551SLASHPCBZ datasheet(9/40 Pages) AD

9 / 40 page

AD9551

Rev. B | Page 9 of 40

NOTES

1. EXPOSED DIE PAD MUST BE CONNECTED TO GND.

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

REFA

REFB

RESET

LDO_IPDIG

VDD

LDO_XTAL

23 VDD

24 LDO_1.8

25 INPUT PLL LOCKED

26 OUTPUT PLL LOCKED

27 VDD

28 OUT2

29 OUT2

30 GND

22 LDO_VCO

21 Y0

TOP VIEW

(Not to Scale)

AD9551

PIN 1

INDICATOR

REFA

REFB

Figure 3. Pin Configuration

Table 12. Pin Function Descriptions

No.

Mnemonic

Type1

Description

9, 23,

27, 34

VDD

Power Supply Connection (3.3 V Analog Supply).

30, 31

GND

Analog Ground.

REFA

Analog Input (Active High)—Reference Clock Input A.

REFA

Analog Input (Active High)—Complementary Reference Clock Input A.

REFB

Analog Input (Active High)—Reference Clock Input B.

REFB

Analog Input (Active High)—Complementary Reference Clock Input B.

Digital Input Chip Select (Active Low).

SCLK

Serial Data Clock.

SDIO

I/O

Digital Serial Data Input/Output.

RESET

Digital Input (Active High). Resets internal logic to default states. This pin has an internal 100 kΩ

pull-up resistor, so the default state of the device is reset.

XTL0

Pin for Connecting an External Crystal (20 MHz to 30 MHz).

XTL1

Pin for Connecting an External Crystal (20 MHz to 30 MHz).

OUT1

Square Wave Clocking Output 1.

OUT1

Complementary Square Wave Clocking Output 1.

OUT2

Square Wave Clocking Output 2.

OUT2

Complementary Square Wave Clocking Output 2.

I/O

Loop Filter Node for the Output PLL. Connect an external 12 nF capacitor (100 nF in 19.44 MHz

mode) from this pin to Pin 22 ( LDO_VCO).

OUTPUT PLL LOCKED

Active High Locked Status Indicator for the Output PLL.

INPUT PLL LOCKED

Active High Locked Status Indicator for the Input PLL.

OUTSEL

Logic 0 selects LVDS, and Logic 1 selects LVPECL-compatible levels for both OUT1 and OUT2

when the outputs are not under SPI port control. Can be overridden via the programming registers.

LDO_IPDIG

P/O

LDO Decoupling Pin. Connect a 0.47 μF decoupling capacitor from this pin to ground.

LDO_XTAL

P/O

LDO Decoupling Pin. Connect a 0.47 μF decoupling capacitor from this pin to ground.

LDO_VCO

P/O

LDO Decoupling Pin. Connect a 0.47 μF decoupling capacitor from this pin to ground.

LDO_1.8

P/O

LDO Decoupling Pin. Connect a 0.47 μF decoupling capacitor from this pin to ground.

Control Pin. Selects preset values for the REFA dividers.

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