MPC8377ECVRAFDA datasheet(67/124 Pages) FREESCALE

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MPC8377E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Serial ATA (SATA)

15.5.1

Compliance Test and Measurement Load

The AC timing and voltage parameters must be verified at the measurement point, as specified within

0.2 inches of the package pins, into a test/measurement load shown in Figure 44.

NOTE

The allowance of the measurement point to be within 0.2 inches of the

package pins is meant to acknowledge that package/board routing may

benefit from D+ and D– not being exactly matched in length at the package

pin boundary. If the vendor does not explicitly state where the measurement

point is located, the measurement point is assumed to be the D+ and D–

package pins.

Figure 44. Compliance Test/Measurement Load

16 Serial ATA (SATA)

This section describes the DC and AC electrical specifications for the serial ATA (SATA) of the

MPC8377E. Note that the external cabled applications or long backplane applications (Gen1x and Gen2x)

are not supported.

16.1

Requirements for SATA REF_CLK

The reference clock is a single ended input clock required for the SATA interface operation. The AC

requirements for the SATA reference clock are listed in the Table 53.

Table 53. SATA Reference Clock Input Requirements

Parameter

Condition

Symbol

Min

Typical

Max

Unit

Notes

SD_REF_CLK/ SD_REF_CLK

frequency range

—tCLK_REF

—

100/125/150

—

MHz

SD_REF_CLK/ SD_REF_CLK

clock frequency tolerance

—tCLK_TOL

–350

+350

ppm

—

SD_REF_CLK/ SD_REF_CLK

reference clock duty cycle

Measured at 1.6V

tCLK_DUTY

—

TX Silicon +

Package

R = 50

C = CTX

D+ Package Pin

D– Package Pin

MPC8377ECVRAFDA Datasheet(PDF) 67 Page - Freescale Semiconductor, Inc

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