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MPC8535EBVTATH Datasheet(PDF) 27 Page - Freescale Semiconductor, Inc |
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MPC8535EBVTATH Datasheet(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 126 page ![]() Power Characteristics MPC8535E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 27 See Section 2.23.6.1, “SYSCLK to Platform Frequency Options,” for the full range of CCB frequencies that MPC8535E supports. Maximum (A) 1250 500 500 1.0 1.0 105 / 90 — 5.3/4.4 — 5.0/4.0 1, 3, 8 Thermal (W) — 4.4/3.6 — 5.0/4.0 1, 4, 8 Typical (W) 65 2.2 1.7 1 Doze (W) 1.6 2.4 1.5 2.1 1 Nap (W) 0.8 1.6 1.5 2.1 1 Sleep (W) 0.8 1.6 1.1 1.7 1 Deep Sleep (W) 35 0 0 0.6 1.2 1, 6 Notes: 1. These values specify the power consumption at nominal voltage and apply to all valid processor bus frequencies and configurations. The values do not include power dissipation for I/O supplies. 2. Typical power is an average value measured at the nominal recommended core voltage (VDD) and 65°C junction temperature (see Table 3) while running the Dhrystone benchmark. 3. Maximum power is the maximum power measured with the worst process and recommended core and platform voltage (VDD) at maximum operating junction temperature (see Table 3) while running a smoke test which includes an entirely L1-cache-resident, contrived sequence of instructions which keep the execution unit maximally busy. 4. Thermal power is the maximum power measured with worst case process and recommended core and platform voltage (VDD) at maximum operating junction temperature (see Table 3) while running the Dhrystone benchmark. 6. Maximum power is the maximum number measured with USB1, eTSEC1, and DDR blocks enabled. The Mean power is the mean power measured with only external interrupts enabled and DDR in self refresh. 7. Mean power is provided for information purposes only and is the mean power consumed by a statistically significant range of devices. 8. Maximum operating junction temperature (see Table 3) for Commercial Tier is 90 0C, for Industrial Tier is 105 0C. 9. Platform power is the power supplied to all the VDD_PLAT pins. Table 5. MPC8535E Power Dissipation (continued)5 Power Mode Core Frequen cy CCB Frequen cy DDR Frequen cy VDD Platfor m VDD Core Junction Tempera ture Core Power Platform Power9 Notes (MHz) (MHz) (MHz) (V) (V) ( °C) mean7 Max mean7 Max |
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