L4969UR-E datasheet(18/46 Pages) STMICROELECTRONICS

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Functional description

L4969UR-E, L4969URD-E

18/46

Doc ID 022587 Rev 2

Figure 3.

State diagram

3.3

CAN transceiver

– Supports double wire unshielded busses

– Baud rate up to 125 KBaud

– Short circuit protection (battery, ground, wires shorted)

– Single wire operation possible (automatic switching to single wire upon bus failures)

– Bus not loaded in case of unpowered transceiver

The CAN transceiver stage is able to transfer serial data on two independent communication

wires either deferentially (normal operation) or in case of a single wire fault on the remaining

line. The physical bitcoding is done using dominant (transmitter active) and overwritable

STARTUP

V1 active

V2, V3, CAN off

t=320ms

STARTUP

FAILURE

t=1ms

(fail ++)

fail = 7

FORCED SLEEP

WAKEUP

V1 off

V1 Low

RESET low

WDC-ACK

WINDOW

WATCHDOG

REFRESH

t=tWIN2

WDC-OK

WDC-FAIL

NORMAL MODE

WINDOW WDC

ACTIVE

WND SET

NORMAL MODE

WINDOW WDC

DISABLED

TIMER

ACTIVE

WDEN SET

TIMEOUT | (WDC-ACK & NOT TIMEOUT(1))

NRES Low

Programmed

DISAR

SET

DISAR

SET

WAKEUP

WAKEUP&V1_UV

Writing to the WDC-

(WDC-ACK)

the NORMAL STATE is

entered.

A missing ACK within 320ms will

initiate a STARTUP FAILURE

phase (RESET low).

If no WDC-ACK is received within

seven retrials the voltage regulator

V1 will be turned off by entering the

FORCED SLEEP state.

Depending on the value from the last

WDC-ACK, another one has to be

written within the specified time frame

(SWDC[1:0]). A failure will activate

the STARTUP STATE

The Window supervision can temporarily be de-

activated for the time programmed during the

last WDC-ACK (WDT[3:0]). Upon rewriting

(WDC-ACK) or expiry of the timer, the NORMAL

STATE is reentered.

If during the last WDC-ACK WND has been set (after releasing

write lock, see description of Watchdog Control Register) the Win-

dow watchdog is deactivated, and no uC supervision is active.

TIMER

ACTIVE

WDEN SET

(restart by double

WDC-ACK & WDEN)

TIMEOUT | WDC-ACK

Here the timer can be used to

generate time events (i.e.

wake-up uC from stop)

After POR, V1 up or externally forced reset

through low NRES, the STARTUP STATE is

entered

The forced sleep mode is left upon wake-up through either CAN or edge on

WAKE. Applying a permanent wake-up (i.e. both CAN-lines dominant) pre-

vents V1 from being turned off (can be used during System debugging)

Setting DISAR (see Voltage Regulator Control Register) Voltage regulator V1 is

turned off, and the output voltage is decreasing depending on the external load

and blocking capacitor.

Note, that during this transition no Reset will be generated (due to Debug mode).

Upon wake-up howewer NRES will be pulled low, if V1was below the programma-

ble reset threshold (V1_UV).

Forcing NRES high externally, fail will not be incremented (Emulation)

(restart by double

WDC-ACK & WDEN)

WAKEUP

WDC-ACK

WDEN SET

SLEEP

V1 OFF

No Reset

WAKEUP

&V1_UV

No Reset

(1) Rewriting of the WDC register when the timer just expires can

lead to an unwanted window watchdog failure resulting in a low

pulse on RESET (see note on section 4.5.4)

L4969UR-E Datasheet(PDF) 18 Page - STMicroelectronics

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