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AS1163 Datasheet(PDF) 43 Page - ams-OSRAM AG |
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AS1163 Datasheet(HTML) 43 Page - ams-OSRAM AG |
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43 / 91 page ![]() AS1163 Functional description Datasheet • PUBLIC • Document Feedback DS001075 • v2-00 • 2025-Nov-21 43 / 91 / 6.7.2 PWM dithering The PWM dithering function is meant to increase the effective PWM carrier frequency. In order to reduce under-sampling artifacts in human vision, the PWM duty cycle is broken down in 8 equally spaced pulses. Setting the DITHERING_EN bit in the CURRENT register will enable the dithering functionality on the PWM engine. The automatic dithering to extend the 15-bit mode to 16-bit will remain active, but the dithering setting will have effect on the 15-bit PWM engine. The dithering mode must be used with 500 Hz mode only. The normal PWM period is divided in 8 parts, and the PWM high period is also divided by 8, so that the nominal PWM frequency becomes 4 kHz (4688 Hz in reality) for every PWM code that is higher than 8 LSB in the 15-bit word (16 bits in the 16-bit word). For PWM settings lower than 8, the period is divided by the number of high-cycles (the effective frequency will depend on this number). For PWM settings that result in a number of high-cycles distant less than 8 cycles from full- scale, the period is nevertheless sub-divided in 8 parts by a low cycle. This results in an effective maximum PWM setting of full-scale minus 8. This means that the maximum value that is representable without saturation is 0xFFF8, all other higher values are saturated to the maximum PWM output. 6.7.3 PWM frequency selection The PWM frame frequency is programmable with the settings being 160 Hz, 320 Hz, 500 Hz, 1 kHz. The first two settings are meant to be used for the external haptic actuator driving. Approximations to the values, to achieve the frequencies by division from the clock frequency are accepted. 6.7.4 PWM linearity The integral nonlinearity (INL) of the PWM after removal of systematic offsets is less than 0.2 LSB over the full PWM operating range. 6.7.5 PWM phase shift Each driver is shifted by 1/9 of period respect to the other drivers (in this way every 1/9 of a period 1 driver is active at low duty cycles). |
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