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AS1163 Datasheet(PDF) 73 Page - ams-OSRAM AG

No. de pieza AS1163
Descripción Electrónicos  Standalone intelligent driver
PDF  91 Pages
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Fabricante Electrónico  AMSOSRAM [ams-OSRAM AG]
Página de inicio  https://ams-osram.com/
Logo AMSOSRAM - ams-OSRAM AG

AS1163 Datasheet(HTML) 73 Page - ams-OSRAM AG

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AS1163
Command and register description
Datasheet • PUBLIC • Document Feedback
DS001075 • v2-00 • 2025-Nov-21
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The OT_LOW_VALUE and OT_HIGH_VALUE are defined in the register. For reset values, the
overtemperature hysteresis (the difference between low threshold and high threshold) is 10
LSB.
7.13.7
SETOTTH (0x4B)
Set OVERTEMPTH register. This register contains low and high thresholds for temperature
check.
Payload is 24-bit. No answer (16-bit TEMPSTAT register if SR bit is set).
The OT_LOW_VALUE and OT_HIGH_VALUE are defined in the register. For reset values, the
overtemperature hysteresis (the difference between low threshold and high threshold) is 10
LSB.
7.13.8
READSETUP (0x4C)
Read SETUP register. No payload. Answer is 8-bit.
Table 30: Format of READSETUP register
Addr: 0x4C
READSETUP
Bit
Bit name
Default
Access
Bit description
7
FAST_PWM
0x0
RW
This bit allows to control the PWM speed and by this the
dynamic range of the color:
0: 500Hz PWM frame rate with 15 bits dynamic range
1: 1000Hz PWM frame rate with 14 bits dynamic range
6
COM_INV
0x0
RW
This bit does control the clock polarity for transmitted
telegrams in “MCU mode”. See chapter 6.5.3 for more
details.
5
CRC_EN
0x0
RW
When set to 1, the CRC check is performed on all
received telegrams.
4
OTP_FSAVE
0x1
RW
This bit controls how a device behaves when an OTP
signature error is detected:
0: Detected error will be set only the flag:
TEST_FLAG@STATUS
No error answer to P4EVENT command.
1: Detected error will set flag and put device into SLEEP
state



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