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ADT7463ARQZ-R7 Datasheet(PDF) 49 Page - ON Semiconductor |
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ADT7463ARQZ-R7 Datasheet(HTML) 49 Page - ON Semiconductor |
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49 / 52 page ![]() REV. C ADT7463 –49– Table XXXVI. Register 0x78 – Configuration Register 3 (Power-On Default = 0x00) Bit Name R/W* Description <0> ALERT Read/Write ALERT = 1, Pin 10 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to indicate out-of-limit error conditions. <1> THERM Read/Write THERM Enable = 1 enables THERM monitoring functionality on the pin Enable determined by Bit 1 (TH5V) of Configuration Register 4. When THERM is asserted, fans can be run at full speed or a timer can be triggered to time how long THERM has been asserted for. <2> BOOST Read/Write BOOST = 1, assertion of THERM causes all fans to run at 100% duty cycle for fail-safe cooling. <3> FAST Read/Write FAST = 1 enables fast TACH measurements on all channels. This increases the TACH measurement rate from once per second, to once every 250 ms (4�). <4> DC1 Read/Write DC1 = 1 enables TACH measurements to be continuously made on TACH1. <5> DC2 Read/Write DC2 = 2 enables TACH measurements to be continuously made on TACH2. <6> DC3 Read/Write DC3 = 1 enables TACH measurements to be continuously made on TACH3. <7> DC4 Read/Write DC4 = 1 enables TACH measurements to be continuously made on TACH4. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect. Table XXXVII. Register 0x79 – THERM Status Register (Power-On Default = 0x00) Bit Name R/W Description <7:1> TMR Read-Only Times how long THERM input is asserted. These seven bits read zero until the THERM assertion time exceeds 45.52 ms. <0> ASRT/TMR0 Read-Only Gets set high on the assertion of the THERM input. Cleared on read. If the THERM assertion time exceeds 45.52 ms, this bit gets set and becomes the LSB of the 8-bit TMR reading. This allows THERM assertion times from 45.52 ms to 5.82 s to be reported back with a resolution of 22.76 ms. Table XXXVIII. Register 0x7A – THERM Limit Register (Power-On Default = 0x00) Bit Name R/W Description <7:0> LIMT Read/Write Sets maximum THERM assertion length allowed, before an interrupt is generated. This is an 8-bit limit with a resolution of 22.76 ms allowing THERM assertion limits of 45.52 ms to 5.82 s to be programmed. If the THERM assertion time exceeds this limit, Bit 5 (F4P) of Interrupt Status Register 2 (Reg 0x42) is set. If the limit value is 0x00, then an interrupt is generated immediately on the assertion of the THERM input. Rev. 4 | Page 49 of 52 | www.onsemi.com |
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