REV. C

ADT7463

–41–

Table XIX. PWM Configuration Registers

Register Address

R/W*

Description

Power-On Default

0x5C

Read/Write

PWM1 Configuration

0x62

0x5D

Read/Write

PWM2 Configuration

0x62

0x5E

Read/Write

PWM3 Configuration

0x62

Bit

Name

R/W

Description

<2:0>

SPIN

Read/Write

These bits control the startup timeout for PWMx. The PWM output stays high until two

valid TACH rising edges are seen from the fan. If there is not a valid TACH signal during the

fan TACH measurement directly after the fan startup timeout period, then the TACH

measurement reads 0xFFFF and Status Register 2 reflects the fan fault. If the TACH

Minimum High and Low Byte contains 0xFFFF or 0x0000, then the Status Register 2

Bit is not set, even if the fan has not started.

000 = No Startup Timeout.

001 = 100 ms.

010 = 250 ms (Default).

011 = 400 ms.

100 = 667 ms.

101 = 1 s.

110 = 2 s.

111 = 4 s.

<3>

SLOW

Read/Write

Slow = 1 makes the ramp rates for acoustic enhancement four times longer.

<4>

INV

Read/Write

This bit inverts the PWM output. The default is 0, which corresponds to a logic high

output for 100% duty cycle. Setting this bit to 1 inverts the PWM output, so 100% duty

cycle corresponds to a logic low output.

<7:5>

BHVR

Read/Write

These bits assign each fan to a particular temperature sensor for localized cooling.

000 = Remote 1 Temp Controls PWMx (Automatic Fan Control Mode).

001 = Local Temp Controls PWMx (Automatic Fan Control Mode).

010 = Remote 2 Temp Controls PWMx (Automatic Fan Control Mode).

011 = PWMx Runs Full Speed (Default).

100 = PWMx Disabled.

101 = Fastest Speed Calculated by Local and Remote 2 Temp Controls PWMx.

110 = Fastest Speed Calculated by All 3 Temperature Channels Controls PWMx.

111 = Manual Mode. PWM Duty Cycle Registers (Reg 0x30 to 0x32) Become Writable.

*These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to these registers fail.

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