AD9880SLASHPCB datasheet(42/64 Pages) AD

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AD9880

Rev. 0 | Page 42 of 64

0x1B

Blue Clamp Select

This bit selects whether the blue channel is clamped to

ground or midscale. Ground clamping is used for blue

in RGB applications and midscale clamping is used in

YPrPb (YUV) applications.

Table 30. Blue Clamp

Select

Result

Channel clamped to ground during clamping period

Channel clamped to midscale during clamping period

The power-up default is 0.

0x1B

Clamp During Coast

This bit permits clamping to be disabled during

Coast. The reason for this is video signals are

generally not at a known backporch or midscale

position during Coast.

Table 31. Clamp During Coast

Select

Result

Clamping during Coast is disabled

Clamping during Coast is enabled

The power-up default is 0.

0x1B

Clamp Disable

Table 32. Clamp Disable

Select

Result

Internal clamp enabled

Internal clamp disabled

The power-up default is 0.

0x1B

2-1

Programmable Bandwidth

Table 33. Bandwidth

Select

Result

Low bandwidth

High bandwidth

The power-up default is 1.

0x1B

Hold Auto Offset

Table 34. Auto Offset Hold

Select

Result

Normal auto offset operation

Hold current offset value

The power-up default is 0.

0x1C

Auto Offset Enable

0 = manual offset

1 = auto offset using offset as target code. The power-

up default is 0.

0x1C

6-5

Auto Offset Update Mode

00 = every clamp

01 = every 16 clamps

10 = every 64 clamps

11 = every Vsync

The power-up default setting is 10.

0x1C

4-3

Difference Shift Amount

00 = 100% of difference used to calculate new offset

01 = 50%

10 = 25%

11 = 12.5%

The power-up default is 01.

0x1C

Auto Jump Enable

0 = normal operation

1 = if the code >15 codes off, the offset is jumped to

the predicted offset necessary to fix the >15 code mis-

match. The power-up default is 1.

0x1C

Post Filter Enable

The post filter reduces the update rate by 1/6 and

requires that all six updates recommend a change

before changing the offset. This prevents unwanted

offset changes.

0 = disable post filer

1 = enable post filter

The power-up default is 1.

0x1C

Toggle Filter Enable

The toggle filter looks for the offset to toggle back and

forth and holds it if triggered. This is to prevent

toggling in case of missing codes in the PGA.

1 = toggle filter on, 0 = toggle filter off.

The power-up default is 0.

0x1D

7-0

Slew Limit

Limits the amount the offset can change by in a single

update. The power-up default is 0x08.

0x1E

7-0

Sync Filter Lock Threshold

This 8-bit register is programmed to set the number

of valid Hsyncs needed to lock the sync filter. This

ensures that a consistent, stable Hsync is present

before attempting to filter. The power-up default

setting is 32d.

0x1F

7-0

Sync Filter Unlock Threshold

This 8-bit register is programmed to set the number of

missing or invalid Hsyncs needed to unlock the sync

filter. This disables the filter operation when there is

no longer a stable Hsync signal. The power-up default

setting is 50d.

AD9880/PCB Datasheet(PDF) 42 Page - Analog Devices

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