PM0215 datasheet(75/91 Pages) STMICROELECTRONICS

75 / 91 page

PM0215

Core peripherals

Doc ID 022979 Rev 1

75/91

4.2.8

NVIC design hints and tips

Ensure software uses correctly aligned register accesses. The processor does not support

unaligned accesses to NVIC registers. See the individual register descriptions for the

supported access sizes.

An interrupt can enter pending state even it is disabled. Disabling an interrupt only prevents

the processor from taking that interrupt.

NVIC programming hints

Software uses the CPSIE I and CPSID I instructions to enable and disable interrupts. The

CMSIS provides the following intrinsic functions for these instructions:

void __disable_irq(void) // Disable Interrupts

void __enable_irq(void) // Enable Interrupts

In addition, the CMSIS provides a number of functions for NVIC control, including:

The input parameter IRQn is the IRQ number, see Table 12: Properties of the different

exception types on page 23. For more information about these functions see the CMSIS

documentation.

Table 28.

CMSIS functions for NVIC control

CMSIS interrupt control function

Description

void NVIC_EnableIRQ(IRQn_t IRQn)

Enable IRQn

void NVIC_DisableIRQ(IRQn_t IRQn)

Disable IRQn

uint32_t NVIC_GetPendingIRQ (IRQn_t IRQn)

Return true (1) if IRQn is pending

void NVIC_SetPendingIRQ (IRQn_t IRQn)

Set IRQn pending

void NVIC_ClearPendingIRQ (IRQn_t IRQn)

Clear IRQn pending status

void NVIC_SetPriority (IRQn_t IRQn, uint32_t priority)

Set priority for IRQn

uint32_t NVIC_GetPriority (IRQn_t IRQn)

Read priority of IRQn

void NVIC_SystemReset (void)

Reset the system

PM0215 Datasheet(PDF) 75 Page - STMicroelectronics