 |
Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
|
Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
PM0215 Datasheet(PDF) 82 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
PM0215 Datasheet(HTML) 82 Page - STMicroelectronics |
|
|
82 / 91 page  Core peripherals PM0215 82/91 Doc ID 022979 Rev 1 4.3.5 Configuration and control register (CCR) Address offset: 0x14 Reset value: 0x0000 0204 The CCR is a read-only register and indicates some aspects of the behavior of the Cortex- M0 processor. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4321 0 Reserved STK ALIGN Reserved UN ALIGN_ TRP Reserved rw rw Bits 31:10 Reserved, must be kept cleared Bit 9 STKALIGN Always reads as one, indicates 8-byte stack alignment on exception entry. On exception entry, the processor uses bit[9] of the stacked PSR to indicate the stack alignment. On return from the exception it uses this stacked bit to restore the correct stack alignment. Bits 8:4 Reserved, must be kept cleared Bit 3 UNALIGN_ TRP Always reads as one, indicates that all unaligned accesses generate a HardFault. Bits 2:0 Reserved, must be kept cleared |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Mexican ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
