RM0319 datasheet(113/368 Pages) STMICROELECTRONICS

113 / 368 page

RM0319

USB 2.0 Host ports (UHC)

Doc ID 022640 Rev 3

113/368

10.3.3

OHCI host controller

Two OHCI Host Controllers compliant with the OHCI specification (version 1.0a) are also

integrated in the UHC to support the 12 Mbps full-speed (FS) and the 1.5 Mbps low-speed

(LS) operation of USB 1.1. FS/LS device connected to port0 is managed by OHCI0 and

port1 is managed by OHCI1.

The USB Open Host Controller is designed to be independent of the Bus Interface Unit

(BIU) as in Figure 32. The host bus is assumed to be at least 32 bits wide with adequate

performance to support the data rate of the particular implementation (100Mbit/sec or

higher plus overhead for DMA structures) as well as bounded latency so that the FIFO’s can

have a reasonable size.

The main blocks of the OHCI host controller are described below.

Figure 32.

USB Host controller (UHOSTC) block diagram

HCI master block

The HCI master block is the interface between HCI master interface logic block and the HCI

bus. It converts all the cycles initiated by different blocks of the list processor through HCI

master inteface logic block into HCI bus cycles according to the protocol defined for HCI

bus. In addition to that it implements a state machine to read/ write from/to DFIFO. When it

is transferring the data returned by endpoint, it reads the data from DFIFO and merges into

DWORD and then send it to the application’s internal FIFO. Similarly when reading the

APB_SADR(6)

APB_SData(32)

HCI_Data(32)

Control

APP_MData(32)

HCM_ADR/

Data(32)

Control

Ext.FIFO Status

HCI

Slave

block

HCI

Master

block

OHCI

Regs

Ctrl

ED/TD_Data(32)

ED/TD_Status(32)

HC_Data(8)

DF_Data(8)

RCFG_RegData(32)

Ctrl

DF_Data(8)

RH_Data(8)

USB

State

Control

List

Processor

Block

ED &TD

Regs

64 x 8

FIFO

Ctrl

FIFO

64 x 8

Cntl

Status

Root Hub

Host SIE

Clock

MUX

12/1_5

HSIE

S/M

DPLL

TxEnL

TxDpls

TxDmns

RcvData

RcvDpls

RcvDmns

Root

Hub

Config

Block

OHCI

Regs

Port

S/M

Port

S/M

Port

S/M

USB

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