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AS3525 Datasheet(PDF) 52 Page - ams AG |
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AS3525 Datasheet(HTML) 52 Page - ams AG |
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52 / 194 page ![]() AS3525-A/-B C22O22 Data Sheet, Confidential © 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.13 52 - 194 GPIO interrupt sense register Table 31 GPIO interrupt sense register Name Base Default GPIO1_IS GPIO2_IS GPIO3_IS GPIO4_IS AS3525_GPIO1_BASE AS3525_GPIO2_BASE AS3525_GPIO3_BASE AS3525_GPIO4_BASE 0xC80B0000 0xC80C0000 0xC80D0000 0xC80E0000 GPIO interrupt sense register Offset: 0x404 Bits set to HIGH configure the corresponding pins to detect levels. Clearing a bit configures the pin to detect edges. All bits are cleared by a reset. Bit Bit Name Default Access Bit Description 7:0 GPIO interrupt sense register 00000000 RW 0: edge on corresponding pin is detected 1: level on corresponding pin is detected GPIO interrupt both edges register Table 32 GPIO interrupt both edges register Name Base Default GPIO1_IBE GPIO2_IBE GPIO3_IBE GPIO4_IBE AS3525_GPIO1_BASE AS3525_GPIO2_BASE AS3525_GPIO3_BASE AS3525_GPIO4_BASE 0xC80B0000 0xC80C0000 0xC80D0000 0xC80E0000 GPIO interrupt both edges register Offset: 0x408 When the corresponding bit in GPIO interrupt sense register (GPIO1_IS, …) is set to detect edges, bits set to HIGH in GPIO interrupt both edges register (GPIO1_IBE, … ) configure the corresponding pin to detect both rising and falling edges, regardless of the corresponding bit in the GPIO interrupt event register (GPIO1_IEV, …). Clearing a bit configures the pin to be controlled by GPIO interrupt event register (GPIO1_IEV, …). All bits are cleared by a reset. Bit Bit Name Default Access Bit Description 7:0 GPIO interrupt event register 00000000 RW 0: on corresponding pin interrupt generation event is controlled by GPIO interrupt event register (GPIO1_IEV, …). 1: both edges on corresponding pin trigger an interrupt. Single edge determined by corresponding bit in GPIO interrupt event register (GPIO1_IEV, …). |
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