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UPD17708 Datasheet(PDF) 28 Page - NEC |
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UPD17708 Datasheet(HTML) 28 Page - NEC |
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28 / 356 page ![]() µPD17704, 17705, 17707, 17708, 17709 28 Figure 2-5. Value of Program Counter Upon Execution of Instruction Table 2-2. Interrupt Vector Address Order Internal/External Interrupt Source Vector Address 1 External Falling edge of CE pin 00CH 2 External INT0 pin 00BH 3 External INT1 pin 00AH 4 External INT2 pin 009H 5 External INT3 pin 008H 6 External INT4 pin 007H 7 Internal Timer 0 006H 8 Internal Timer 1 005H 9 Internal Timer 2 004H 10 Internal Timer 3 003H 11 Internal Serial interface 0 002H 12 Internal Serial interface 1 001H Contents of Program Counter (PC) SGR 1 0 0 b12 0 0 1 1 0 0 0 b11 0 1 0 1 0 0 0 b10 0 b9 0 b8 0 b7 0 0 b6 0 0 b5 0 0 b4 0 0 b3 0 b2 0 b1 0 b0 0 Program counter Instruction BR addr CALL addr SYSCAL entry BR @AR CALL @AR MOVT DBF, @AR RET RETSK RETI Other instructions (including skip instruction) When interrupt is accepted Power-ON reset, watchdog timer reset, RESET pin, CE reset Page 0 Page 1 Page 2 Page 3 entryL entryH Operand of instruction (addr) Operand of instruction (addr) Contents of address register Re- tained Re- tained Contents of address stack register (ASR) (return address) specified by stack pointer (SP) Vector address of each interrupt Increment entryH : high-order 3 bits of entry entryL : low-order 4 bits of entry Re- tained |
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