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UPD17708 Datasheet(PDF) 70 Page - NEC

No. de pieza UPD17708
Descripción Electrónicos  4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM
PDF  356 Pages
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Fabricante Electrónico  NEC [NEC]
Página de inicio  http://www.nec.com/
Logo NEC - NEC

UPD17708 Datasheet(HTML) 70 Page - NEC

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µPD17704, 17705, 17707, 17708, 17709
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Table 8-1. Peripheral Hardware Control Functions of Control Registers (1/8)
Peripheral
Control Register
Peripheral Hardware Control Function
At Reset
Clock
Hardware
Name
Address
Read/
Function
Set value
Power- WDT
CE
Stop
Write
Symbol
ON
& SP
reset
01
reset
reset
Stack
Stack pointer
01H
R/W
(SP3)
FFF
Retained
(SP2)
(SP1)
(SP0)
Interrupt stack
08H
R
0
555
Retained
pointer of
(SYSRSP2)
system register
(SYSRSP1)
(SYSRSP0)
Data buffer
04H
R
0
Fixed to “0”
0
0
0
Retained
stack pointer
0
(DBFSP1)
Detects nesting level
(DBFSP0)
of data buffer stack
Stack overflow/
05H
R/W
0
Fixed to “0”
3
Retained Retained Retained
underflow reset
0
selection
ISPRES
Selects interrupt stack
Reset
Reset valid
overflow/underflow reset
prohibited
(can be set only once
following power application)
ASPRES
Selects address stack
overflow/underflow reset
(can be set only once
following power application)
Watchdog Watchdog timer
02H
R/W
0
Fixed to “0”
3
Retained Retained Retained
timer
clock selection
0
WDTCK1
Selects clock of watchdog timer (can be
WDTCK0
set only once following power application)
Watchdog timer
03H
W &
WDTRES
Resets watchdog timer counter
Invalid
Reset if written Undefined Undefined Undefined Undefined
counter reset
Reset 0
Fixed to “0”
0
0
WDT&SP reset
16H
R &
0
01
Retained Retained
status detection
Reset 0
0
WDTCY
Detects resetting of watchdog
No reset
Reset request
timer/stack pointer
request
b3
b2
b1
b0
0011
Level 0
Level 1
Level 2
Level 3
0101
00
1
1
Not 65536
Setting
131072
used instruction prohibited instruction
01
0
1



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