UPD17708 datasheet(53/356 Pages) NEC

53 / 356 page

µPD17704, 17705, 17707, 17708, 17709

5.7.2 Function of general register pointer

The general register pointer specifies a general register on the data memory.

Figure 5-8 shows the addresses of the general registers specified by the general register pointer.

As shown in the figure, a bank is specified by the high-order 4 bits (RPH: address 7DH) of the general register

pointer, and a row address is specified by the low-order 3 bits (RPL: address 7EH).

Because the valid number of bits of the general register pointer is 7, all the row addresses (0H through 7FH)

of all the banks can be specified as general registers.

For the details of the operation of the general register, refer to 6. GENERAL REGISTER (GR).

Figure 5-8. Address of General Register Specified by General Register Pointer

Remark

The

µPD17704 and 17705 do not have BANKs 6 through 14.

The

µPD17707 and 17708 do not have BANKs 10 through 14.

Caution The area to which the data memory is allocated differs depending on the model. For details,

refer to Figure 4-2 Configuration of Data Memory.

5.7.3 Cautions on using general register pointer

The lowest bit of address 7EH (RPL) of the general register pointer is allocated as the BCD flag of the program

status word.

When rewriting RPL, therefore, pay attention to the value of the BCD flag.

General register pointer

(RP)

RPH

RPL

Specifies row address of each bank

Bank

BANK0

BANK15

Row address

Specifies bank

UPD17708 Datasheet(PDF) 53 Page - NEC