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UPD17708 Datasheet(PDF) 41 Page - NEC |
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UPD17708 Datasheet(HTML) 41 Page - NEC |
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41 / 356 page ![]() 41 µPD17704, 17705, 17707, 17708, 17709 Figure 4-2. Configuration of Data Memory (3/3) (c) µPD17704, 17705 Note An identical system register exists. Cautions 1. The µPD17704 and 17705 do not have BANKs 6 through 14. 2. Nothing is allocated to addresses 00H through 5FH of BANK15. System registers BANK0 Data memory 0 1 2 3 4 5 6 7 0 BANK1 Column address 01 0 1 2 3 4 5 6 7 General registers System registers (SYSREG)Note Example Address 51H of BANK 0 b3 b2 b1 b0 0 1 2 3 4 5 6 7 Port register System registers (SYSREG)Note 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 System registers (SYSREG)Note System registers (SYSREG)Note 123456789 A B C D E F BANK2 BANK5 BANK15 23456789 A B C DE F Data buffer 0123456789 A B C DE F 0123456789 A B C DE F Column address Fixed to 0 0123456789 A B C DE F BANK0 Column address BANK1-BANK3 Column address BANK4, BANK5 Column address BANK15 Port register Fixed to 0 Port input/output selection registers |
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