UPD17708 datasheet(133/356 Pages) NEC

133 / 356 page

133

µPD17704, 17705, 17707, 17708, 17709

12.3 Interrupt Stack Register

12.3.1 Configuration and function of interrupt stack register

Figure 12-17 shows the configuration of the interrupt stack register.

The interrupt stack register saves the contents of the following system registers (except the address register

(AR)) when an interrupt is accepted.

•

Window register (WR)

•

Bank register (BANK)

•

Index register (IX)

•

General pointer (RP)

•

Program status word (PSWORD)

When an interrupt is accepted and the contents of the above system registers are saved to the interrupt stack,

the contents of the above system registers, except the window register, are reset to “0”.

The interrupt stack can save the contents of the above system registers at up to four levels.

Therefore, interrupts can be nested up to four levels.

The contents of the interrupt stack register are restored to the system registers when the interrupt return

(RETI) instruction is executed.

The contents of the interrupt stack register are undefined at power-ON reset.

The previous contents are retained at CE reset and on execution of the clock stop instruction.

Figure 12-17. Configuration of Interrupt Stack Register

Window

stack

WRSK

b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0

Bank

stack

BANKSK

Index

stack H

IXHSK

Index

stack M

IXHSK

Index

stack L

IXHSK

Pointer

stack H

RPHSK

Pointer

stack L

RPLSK

Status

stack

PSWSK

Bit

Undefined

Interrupt stack register (INTSK)

Name

Address

INTSK1

INTSK2

INTSK3

INTSK4

Interrupt stack

pointer of

system register

Bit

Undefined

UPD17708 Datasheet(PDF) 133 Page - NEC

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