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UPD17708 Datasheet(PDF) 172 Page - NEC |
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UPD17708 Datasheet(HTML) 172 Page - NEC |
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172 / 356 page ![]() µPD17704, 17705, 17707, 17708, 17709 172 13.4 Timer 1 13.4.1 Outline of timer 1 Figure 13-17 outlines timer 1. Timer 1 counts the basic clock (100, 10, 2, or 1 kHz) with an 8-bit counter, and compares the count value with a value set in advance. Figure 13-17. Outline of Timer 1 Remarks 1. TM1CK1 and TM1CK0 (bits 1 and 0 of timer 1 counter clock selection register: refer to Figure 13-18) set the basic clock frequency. 2. TM1EN (bit 3 of timer 1 counter clock selection register: refer to Figure 13-18) starts or stops timer 1. 3. TM1RES (bit 2 of timer 1 counter clock selection register: refer to Figure 13-18) resets timer 1 counter. Clock selection 4.5 MHz Start/stop Timre 1 counter (TM1C) TM1CK1 flag TM1CK0 flag TM1EN flag Coincidence detection circuit TM1RES flag DBF Timer 1 IRQTM1 flag Interrupt control DBF Timer 1 modulo register (TM1M) |
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