COP8TAB5 datasheet(2/54 Pages) NSC

No. de pieza	COP8TAB5

Descripción Electrónicos	8-Bit CMOS ROM Microcontroller with 2k or 4k Memory

PDF	54 Pages

Scroll/Zoom	100%

Fabricante Electrónico	NSC [National Semiconductor (TI)]

Página de inicio	http://www.national.com

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2 / 54 page

3.0 Block Diagram

20091701

4.0 Ordering Information

Part Numbering Scheme

COP8

Family and

Feature Set

Indicator

Program

Memory

Size

Program

Memory

Type

No. Of Pins

Package

Type

Temperature

B=2k

C=4k

5 = Masked ROM

9 = Flash

C=20Pin

E=28Pin

H=44Pin

LQ = LLP

MW = SOIC WIDE

8 = -40 to +85˚C

NOTE: The user, utilizing the COP8TAx9 Flash based de-

vices during development, is cautioned to ensure that code

contains NO calls to Boot ROM functions prior to submission

for ROM generation. Instances of the JSRB instruction in

ROM based devices will be executed as a JSR instruction to

a location in the first 256 bytes of Program Memory.

Flash and ROM devices are not 100% identical. The execu-

tion of the JSRB instruction is an example of the potential

differences between the devices. For this reason, the user is

strongly advised to obtain masked ROM prototype devices

before committing to production quantities. This will allow the

user to ensure there are no unexpected differences between

Flash and ROM devices within the application.

COP8TAB5 Datasheet(PDF) 2 Page - National Semiconductor (TI)

COP8TAB5 Datasheet(HTML) 2 Page - National Semiconductor (TI)

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