COP8TAB5 datasheet(42/54 Pages) NSC

42 / 54 page

18.0 Instruction Set (Continued)

Different addressing modes are used to specify the new

address for the Program Counter. The choice of addressing

mode depends primarily on the distance of the jump. Farther

jumps sometimes require more instruction bytes in order to

completely specify the new Program Counter contents.

The available transfer-of-control addressing modes are:

•

Jump Relative

•

Jump Absolute

•

Jump Absolute Long

•

Jump Indirect

The transfer-of-control addressing modes are described be-

low. Each description includes an example of a Jump in-

struction using a particular addressing mode, and the effect

on the Program Counter bytes of executing that instruction.

Jump Relative. In this 1-byte instruction, six bits of the

instruction opcode specify the distance of the jump from the

current program memory location. The distance of the jump

can range from −31 to +32. A JP+1 instruction is not allowed.

The programmer should use a NOP instead.

Example: Jump Relative

JP 0A

Reg

Contents

Before

After

PCU

02 Hex

PCL

05 Hex

0F Hex

Jump Absolute. In this 2-byte instruction, 12 bits of the

instruction opcode specify the new contents of the Program

Counter. The upper three bits of the Program Counter re-

main unchanged, restricting the new Program Counter ad-

dress to the same 4-kbyte address space as the current

instruction. (This restriction is relevant only in devices using

more than one 4-kbyte program memory space.)

Example: Jump Absolute

JMP 0125

Reg

Contents

Before

After

PCU

0C Hex

01 Hex

PCL

77 Hex

25 Hex

Jump Absolute Long. In this 3-byte instruction, 15 bits of

the instruction opcode specify the new contents of the Pro-

gram Counter.

Example: Jump Absolute Long

JMP 03625

Reg/

Contents

Memory

Before

After

PCU

42 Hex

36 Hex

PCL

36 Hex

25 Hex

Jump Indirect. In this 1-byte instruction, the lower byte of

the jump address is obtained from a table stored in program

memory, with the Accumulator serving as the low order byte

of a pointer into program memory. For purposes of access-

ing program memory, the contents of the Accumulator are

written to PCL (temporarily). The data pointed to by the

Program Counter (PCH/PCL) is loaded into PCL, while PCH

remains unchanged.

Example: Jump Indirect

JID

Reg/

Contents

Memory

Before

After

PCU

01 Hex

PCL

C4 Hex

32 Hex

Accumulator

26 Hex

Memory

Location

32 Hex

0126 Hex

The VIS instruction is a special case of the Indirect Transfer

of Control addressing mode, where the double-byte vector

associated with the interrupt is transferred from adjacent

addresses in program memory into the Program Counter in

order to jump to the associated interrupt service routine.

18.4 INSTRUCTION TYPES

The instruction set contains a wide variety of instructions.

The available instructions are listed below, organized into

related groups.

Some instructions test a condition and skip the next instruc-

tion if the condition is not true. Skipped instructions are

executed as no-operation (NOP) instructions.

18.4.1 Arithmetic Instructions

The arithmetic instructions perform binary arithmetic such as

addition and subtraction, with or without the Carry bit.

Add (ADD)

Add with Carry (ADC)

Subtract with Carry (SUBC)

Increment (INC)

Decrement (DEC)

Decimal Correct (DCOR)

Clear Accumulator (CLR)

Set Carry (SC)

Reset Carry (RC)

18.4.2 Transfer-of-Control Instructions

The transfer-of-control instructions change the usual se-

quential program flow by altering the contents of the Pro-

gram Counter. The Jump to Subroutine instructions save the

Program Counter contents on the stack before jumping; the

Return instructions pop the top of the stack back into the

Program Counter.

Jump Relative (JP)

Jump Absolute (JMP)

Jump Absolute Long (JMPL)

Jump Indirect (JID)

Jump to Subroutine (JSR)

Jump to Subroutine Long (JSRL)

Return from Subroutine (RET)

Return from Subroutine and Skip (RETSK)

Return from Interrupt (RETI)

Software Trap Interrupt (INTR)

Vector Interrupt Select (VIS)

COP8TAB5 Datasheet(PDF) 42 Page - National Semiconductor (TI)

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