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S25FL256SDPNFAQ Datasheet(PDF) 74 Page - Cypress Semiconductor |
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S25FL256SDPNFAQ Datasheet(HTML) 74 Page - Cypress Semiconductor |
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74 / 149 page ![]() Document Number: 001-98283 Rev. *M Page 73 of 148 S25FL128S/S25FL256S Figure 45. Read Electronic Signature (RES) Command Sequence 9.3 Register Access Commands 9.3.1 Read Status Register-1 (RDSR1 05h) The Read Status Register-1 (RDSR1) command allows the Status Register-1 contents to be read from SO. The Status Register-1 contents may be read at any time, even while a program, erase, or write operation is in progress. It is possible to read the Status Register-1 continuously by providing multiples of eight clock cycles. The status is updated for each eight cycle read. The maximum clock frequency for the RDSR1 (05h) command is 133 MHz. Figure 9.2 Read Status Register-1 (RDSR1) Command Sequence Table 47. RES Values Device Device ID (hex) S25FL128S 17 S25FL256S 18 1 3 210 9 8 7 6 5 4 0 31 30 29 28 Instruction 3 Dummy Bytes 23 21 22 1 32 0 36 35 34 33 32 39 38 37 SCK SI SO High Impedance MSB Electonic ID MSB 1 32 0 7654 CS# 1 3 2 10 9 8 7 6 5 4 0 14 13 12 11 Instruction 1 3 2 0 7 6 5 4 SCK SO High Impedance MSB Status Register-1 Out SI 15 18 17 16 22 21 20 19 1 3 2 0 7 6 5 4 MSB Status Register-1 Out 23 7 MSB CS # |
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