STLC5465B datasheet(34/101 Pages) STMICROELECTRONICS

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III.4 - Microprocessor Interface

III.4.1 - Description

The

Multi-HDLC circuit can be controlledby several

types of microprocessors (ST9, Intel/Motorola 8 or

16 data bits interfaces) such as :

- ST9 family

- INTEL 80C188 8 bits

- INTEL 80C186 16 bits

- MOTOROLA 68000 16 bits

- MOTOROLA 68020 16/32 bits

- ST10 family

During the initialization of the

Multi-HDLC circuit,

the microprocessor interface is informedof the type

of microprocessor that is connectedby polarisation

of three external pins MOD 0/2).

Two chip Select (CS0/1)pins are provided.CS0 will

select the internal registers and CS1 the external

memory.

Table 14 : Microprocessor Interface Selection

MOD2

MOD1

MOD0

Microprocessor

80C188

80C186

68000

68020

001

ST9

ST10 A/D multiplexed

ST10 A/D not multiplexed

Reserved

TDM 0, 2

if PCM

at 4 Mb/ s

GCI side

DOUT4/5

DESCRAMBLER

up to 32

SWITCHING

MATRIX

TX MON

controller

up to 16

primitives

C/I interrupt Queue

located in shared memory

Microprocessor

AIS

Detection

up to 16

ISDN channels

Interrupt controller

TX C/I

controller

up to 16

primitives

SCR

A, E, S1 to S4

B1, B2

by timeslot

Extension RX

C/I controller

up to 16

ISDN channels

B1, B2

A, E, MON

C/I

B1, B2

(16 bits)

Figure 17: From ISDN channels to GCI Channels

III - FUNCTIONAL DESCRIPTION (continued)

STLC5465B

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