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UPD17708 Datasheet(PDF) 320 Page - NEC |
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UPD17708 Datasheet(HTML) 320 Page - NEC |
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320 / 356 page ![]() 320 µPD17704, 17705, 17707, 17708, 17709 21.5 Reset by RESET Pin The device is reset by the RESET pin in the following cases: • To reset the device at voltage higher than power-ON clear voltage • External reset input in case of software hang-up Caution If the device is reset by the RESET pin during program execution, the data in the data memory may be corrupted. Therefore, be careful when resetting with the RESET pin. The reset operation is the same as that performed at power-ON reset. When a low level is input to the RESET pin, an internal reset signal is generated, the crystal oscillation circuit is stopped, and the device stops operation. At this point, the program counter, stack, system registers, and control registers are initialized (for the initial value, refer to the description of each register). When the RESET pin is raised next time, the crystal oscillation is started, and the device waits to be released from the halt wait status by the basic timer 0 carry which has been initialized to a 100-ms cycle. The program starts from address 0 at the rising edge of the basic timer 0 carry FF setting signal 50 ms after a high level has been input to the RESET pin. Because the µPD17709 has a power-ON reset function, connect the RESET pin to VDD via resistor if the RESET pin is not used for the above application. Figure 21-10. Reset Operation by RESET Pin VDD RESET XOUT BTM0CY flag setting pulse 5 V 0 V H L H L H L Device opeation stops Halt status 50 ms Oscillation starts Program starts from address 0 |
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