UPD17708 datasheet(146/356 Pages) NEC

No. de pieza	UPD17708

Descripción Electrónicos	4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

PDF	356 Pages

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Fabricante Electrónico	NEC [NEC]

Página de inicio	http://www.nec.com/

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µPD17704, 17705, 17707, 17708, 17709

146

Figure 12-21. Configuration of Interrupt Edge Selection Register (2/2)

Caution

The external input is delayed about 100 ns.

Note that an interrupt request signal may be issued at the time when the interrupt request issuance edge is

switched by the interrupt edge selection flags (IEG0 through IEG4).

As indicated in the table 12-3, for example, if the IEG0 flag is set to “1” (falling edge), the high level is input

from the INT0 pin and the IEG0 flag is reset to “0”, the edge detection circuit judges that the rising edge is input

and an interrupt request is issued.

Name

Flag symbol

Address

1FH

Read/Write

R/W

Interrupt edge selection 2

Power-ON reset

WDT&SP reset

CE reset

Clock stop

Rising edge

Falling edge

Selects input edge to issue interrupt request (INT0 pin)

Rising edge

Falling edge

Selects input edge to issue interrupt request (INT1 pin)

Rising edge

Falling edge

Selects input edge to issue interrupt request (INT2 pin)

Fixed to “0”

Retained

UPD17708 Datasheet(PDF) 146 Page - NEC