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S25FL256SDPNFAQ Datasheet(PDF) 127 Page - Cypress Semiconductor |
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S25FL256SDPNFAQ Datasheet(HTML) 127 Page - Cypress Semiconductor |
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127 / 149 page ![]() Document Number: 001-98283 Rev. *M Page 126 of 148 S25FL128S/S25FL256S Table 58. Device Geometry Definition for 128-Mbit and 256-Mbit Uniform Sector Devices Byte Address Data Description 27h 18h (128 Mb) 19h (256 Mb) Device Size = 2N bytes 28h 02h Flash Device Interface Description: 0000h = x8 only 0001h = x16 only 0002h = x8/x16 capable 0003h = x32 only 0004h = Single I/O SPI, 3-byte address 0005h = Multi I/O SPI, 3-byte address 0102h = Multi I/O SPI, 3- or 4-byte address 29h 01h 2Ah 09h Max. number of bytes in multi-byte write = 2N (0000 = not supported 0008h = 256B page 0009h = 512B page) 2Bh 00h 2Ch 01h Number of Erase Block Regions within device 1 = Uniform Device, 2 = Boot Device 2Dh 3Fh (128 Mb) 7Fh (256 Mb) Erase Block Region 1 Information (refer to JEDEC JEP137): 64 sectors = 64-1 = 003Fh (128 Mb) 128 sectors = 128-1 = 007Fh (256 Mb) 256-kB sectors = 256 bytes x 0400h 2Eh 00h 2Fh 00h 30h 04h 31h thru 3Fh FFh RFU Table 59. CFI Primary Vendor-Specific Extended Query Byte Address Data Description 40h 50h Query-unique ASCII string “PRI” 41h 52h 42h 49h 43h 31h Major version number = 1, ASCII 44h 33h Minor version number = 3, ASCII 45h 21h Address Sensitive Unlock (Bits 1-0) 00b = Required 01b = Not Required Process Technology (Bits 5-2) 0000b = 0.23 µm Floating Gate 0001b = 0.17 µm Floating Gate 0010b = 0.23 µm MirrorBit 0011b = 0.11 µm Floating Gate 0100b = 0.11 µm MirrorBit 0101b = 0.09 µm MirrorBit 1000b = 0.065 µm MirrorBit 46h 02h Erase Suspend 0 = Not Supported 1 = Read Only 2 = Read and Program |
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