S25FL256SDPNFAQ datasheet(126/149 Pages) CYPRESS

126 / 149 page

Document Number: 001-98283 Rev. *M

Page 125 of 148

S25FL128S/S25FL256S

Note:

1. FL-S 128 Mbit and 256-Mbit devices have either a hybrid sector architecture with thirty two 4-kB sectors and all remaining sectors of 64-kB or with uniform 256-kB

sectors. Devices with the hybrid sector architecture are initially shipped from Cypress with the 4 kB sectors located at the bottom of the array address map. However,

the device configuration TBPARM bit CR1[2] may be programed to invert the sector map to place the 4-kB sectors at the top of the array address map. The CFI

geometry information of the above table is relevant only to the initial delivery state of a hybrid sector device. The flash device driver software must examine the

TBPARM bit to determine if the sector map was inverted at a later time.

Table 56. CFI System Interface String

Byte Address

Data

Description

1Bh

27h

VCC Min. (erase/program): 100 millivolts

1Ch

36h

VCC Max. (erase/program): 100 millivolts

1Dh

00h

VPP Min. voltage (00h = no VPP present)

1Eh

00h

VPP Max. voltage (00h = no VPP present)

1Fh

06h

Typical timeout per single byte program 2N µs

20h

08h (256B page)

09h (512B page)

Typical timeout for Min. size Page program 2N µs

(00h = not supported)

21h

08h (4 kB or 64 kB)

09h (256 kB)

Typical timeout per individual sector erase 2N ms

22h

0Fh (128 Mb)

10h (256 Mb)

Typical timeout for full chip erase 2N ms (00h = not supported)

23h

02h

Max. timeout for byte program 2N times typical

24h

02h

Max. timeout for page program 2N times typical

25h

03h

Max. timeout per individual sector erase 2N times typical

26h

03h

Max. timeout for full chip erase 2N times typical

(00h = not supported)

Table 57. Device Geometry Definition for 128-Mbit and 256-Mbit Bottom Boot Initial Delivery State

Byte Address

Data

Description

27h

18h (128 Mb)

19h (256 Mb)

Device Size = 2N bytes

28h

02h

Flash Device Interface Description:

0000h = x8 only

0001h = x16 only

0002h = x8/x16 capable

0003h = x32 only

0004h = Single I/O SPI, 3-byte address

0005h = Multi I/O SPI, 3-byte address

0102h = Multi I/O SPI, 3- or 4-byte address

29h

01h

2Ah

08h

Max. number of bytes in multi-byte write = 2N

(0000 = not supported

0008h = 256B page

0009h = 512B page)

2Bh

00h

2Ch

02h

Number of Erase Block Regions within device

1 = Uniform Device, 2 = Boot Device

2Dh

1Fh

Erase Block Region 1 Information (refer to JEDEC JEP137):

32 sectors = 32-1 = 001Fh

4-kB sectors = 256 bytes x 0010h

2Eh

00h

2Fh

10h

30h

00h

31h

FDh

Erase Block Region 2 Information:

254 sectors = 254-1 = 00FDh (128 Mb)

510 sectors = 510-1 = 01FDh (256 Mb)

64-kB sectors = 0100h x 256 bytes

32h

00h (128 Mb)

01h (256 Mb)

33h

00h

34h

01h

35h thru 3Fh

FFh

RFU

S25FL256SDPNFAQ Datasheet(PDF) 126 Page - Cypress Semiconductor

S25FL256SDPNFAQ Datasheet(HTML) 126 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL