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UPD17708 Datasheet(PDF) 235 Page - NEC |
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UPD17708 Datasheet(HTML) 235 Page - NEC |
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235 / 356 page ![]() 235 µPD17704, 17705, 17707, 17708, 17709 Figure 16-13. Start/Stop Condition Recognition Timing (a) Start condition recognition timing SBSTT Serial data pin Shift clock pin SBBSY L H Detects falling of serial data pin About 1 s Start condition is assumed if shift clock pin goes high about 1 s after serial data pin has gone low. L H H L L H µ µ (b) Stop condition recognition timing SBSTT Serial data pin Shift clock pin SBBSY L H Detects rising of serial data pin About 1 s Stop condition is assumed if shift clock pin goes high about 1 s after serial data pin has gone high. H L H L L H µ µ |
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