UPD17708 datasheet(273/356 Pages) NEC

273 / 356 page

273

µPD17704, 17705, 17707, 17708, 17709

18.2 Input/Output Selection Block and Gate Time Control Block

Figure 18-2 shows the configuration of the input/output selection block and gate time control block.

The input/output selection block consists of an IF counter input selection block and FCG I/O selection block.

The IF counter input selection block selects whether the frequency counter is used as an IF counter or an external

gate counter, by using the IF counter mode register. When the frequency counter is used as the IF counter, either

P1C0/FMIFC or P1C1/AMIFC pin and a count mode are selected. The pin not used for the IF counter is used as a

general-purpose input port pin.

The FCG I/O selection block selects the P2A1/FCG1 or P2A0/FCG0 pin by using the FCG channel selection

purpose I/O port pin.

When using the frequency counter as the external gate counter, the pin to be used must be set in the input mode

by using the port 2A bit I/O selection register. This is because the pin is set in the general-purpose output port mode

if it is set in the output mode even if the external gate counter function is selected by the IF counter mode selection

The gate time control block selects gate time by using the IF counter mode selection register when the frequency

counter is used as the IF counter, or a count frequency when the frequency counter is used as the external gate counter.

Figure 18-3 shows the configuration of the IF counter mode selection register.

Figure 18-4 shows the configuration of the FCG channel selection register.

Figure 18-2. Configuration of I/O Selection Block and Gate Time Control Block

1/2

P2A1/FCG1

P2A0/FCG0

P1C0/FMIFC

P1C1/AMIFC

Input port

FMIFC

AMIFC

Gate signal

generator

Frequency generator

Selector

Frequency

Gate signal

To start/stop control

block

I/O port

FCGCH1 flag

FCGCH0 flag

IFCMD1 flag

IFCMD0 flag

FCG

IFCCK1 flag

IFCCK0 flag

Selector

UPD17708 Datasheet(PDF) 273 Page - NEC

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