UPD17708 datasheet(186/356 Pages) NEC

186 / 356 page

µPD17704, 17705, 17707, 17708, 17709

186

13.6 Timer 3

13.6.1 Outline of timer 3

Figure 13-25 outlines timer 3.

Timer 3 counts the basic clock (1.125 MHz or 112.5 kHz selectable) with an 8-bit counter Note, and compares

the count value with a value set in advance.

Because timer 3 is multiplexed with a D/A converter, all the three D/A converter pins are automatically set

in the general-purpose port mode when timer 3 is used.

Note

A 9-bit or 8-bit counter can be selected for the D/A converter, but the 8-bit counter is automatically

selected when the timer function is selected.

Figure 13-25. Outline of Timer 3

Remarks 1. PWMCK (bit 0 of PWM clock selection register: refer to Figure 13-26) selects the output

frequency of timer 3.

2. TM3SEL (bit 3 of timer 3 control register: refer to Figure 13-27) selects timer 3 or D/A converter.

3. TM3EN (bit 1 of timer 3 control register: refer to Figure 13-27) starts or stops counting by timer

4. TM3RES (bit 0 of timer 3 control register: refer to Figure 13-27) controls resetting of timer 3

counter.

Clock selection

4.5 MHz

Start/stop

Timer 3 counter (TM3C)

PWMCK flag

TM3EN flag

TM3SEL flag

Coincidence detection circuit

TM3RES

flag

DBF

IRQTM3 flag

Interrupt control

Timer 3 modulo register

(TM3M)

UPD17708 Datasheet(PDF) 186 Page - NEC