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UPD17708 Datasheet(PDF) 187 Page - NEC

No. de pieza UPD17708
Descripción Electrónicos  4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM
PDF  356 Pages
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Fabricante Electrónico  NEC [NEC]
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UPD17708 Datasheet(HTML) 187 Page - NEC

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µPD17704, 17705, 17707, 17708, 17709
13.6.2 Clock selection block
The clock of timer 3 is selected by the PWMCK flag of the PWM clock selection register.
Figure 13-26 shows the configuration of the flag.
Figure 13-26. Configuration of PWM Clock Selection Register
Name
Flag symbol
b3
0
b2
P
W
M
B
I
T
b1
0
b0
P
W
M
C
K
Address
26H
Read/Write
R/W
PWM clock selection
Power-ON reset
WDT&SP reset
CE reset
Clock stop
R:Retained
0
1
0
0
R
0
4.4 kHz (8 bits)/2.2 kHz (9 bits)
440 Hz (8 bits)/220 Hz (9 bits)
Selects output frequency of timer 3
00
0
R
0
Fixed to “0”
Fixed to “0”
8 bits
9 bits
0
Selects number of bits of PWM counter
0
1



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