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S25FL256SDPNFAQ Datasheet(PDF) 122 Page - Cypress Semiconductor

No. de pieza S25FL256SDPNFAQ
Descripción Electrónicos  128 Mbit (16 Mbyte)/256 Mbit (32 Mbyte) 128 Mbit (16 Mbyte)/256 Mbit (32 Mbyte)
PDF  149 Pages
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Fabricante Electrónico  CYPRESS [Cypress Semiconductor]
Página de inicio  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

S25FL256SDPNFAQ Datasheet(HTML) 122 Page - Cypress Semiconductor

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Document Number: 001-98283 Rev. *M
Page 121 of 148
S25FL128S/S25FL256S
10. Data Integrity
10.1
Erase Endurance
Note:
1. Each write command to a non-volatile register causes a PE cycle on the entire non-volatile register array.
10.2
Data Retention
Contact Cypress Sales and FAE for further information on the data integrity. An application note is available at:
www.cypress.com/appnotes
Table 10.1 Erase Endurance
Parameter
Minimum
Unit
Program/Erase cycles per main Flash array sectors
100K
PE cycle
Program/Erase cycles per PPB array or non-volatile register array (1)
100K
PE cycle
Table 10.2 Data Retention
Parameter
Test Conditions
Minimum
Time
Unit
Data Retention Time
10K Program/Erase Cycles
20
Years
100K Program/Erase Cycles
2
Years



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