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Data Sheet

ADRF6620

Rev. 0 | Page 31 of 52

IP3 AND NOISE FIGURE OPTIMIZATION

The ADRF6620 can be configured for either improved perfor-

mance or reduced power consumption. In applications where

performance is critical, the ADRF6620 offers IP3 or noise figure

optimization. However, if power consumption is the priority, the

mixer bias current can be reduced to save on the overall power

at the expense of degraded performance. Whatever the application

specific needs are, the ADRF6620 offers configurability that

balances performance and power consumption.

Adjustments to the mixer bias setting have the most impact on

performance and power. For this reason, mixer bias should be

the first adjustment. The active mixer core of the ADRF6620 is a

linearized transconductor. With increased bias current, the

transconductor becomes more linear, resulting in higher IP3.

The improved IP3, however, is at the expense of degraded noise

figure and increased power consumption (see Figure 75). For a

1-bit change of the mixer bias (MIXER_BIAS, Register 0x31,

Bits[11:9]), the current increases by 7.71 mA.

150

155

160

165

170

175

180

185

190

195

200

205

210

215

220

MIXER BIAS

900MHz

1900MHz

2100MHz

2600MHz

RF FREQ:

Δ1

Δ7.71 mA

Figure 75. Change in Current Consumption vs. MIXER_BIAS

Inevitably, there is a limit on how much the bias current can

increase before the improvement in linearity no longer justifies the

increase in power and noise. The mixer core reaches a saturation

point where further increases in bias current do not translate to

improved performance. When that point is reached, it is best to

decrease the bias current to a level where the desired performance

is achieved. Depending on the system specifications of the cus-

tomer, a balance between linearity, noise figure, and power can

be attained.

In addition to bias optimization, the ADRF6620 also has

configurable distortion cancellation circuitry. The linearized

transconductor input of the ADRF6620 is made up of a main path

and a secondary path. Through adjustments of the amplitude and

phase of the secondary path, the distortion generated by the main

path can be canceled, resulting in improved IPd3 performance.

The amplitude and phase adjustments are located in the following

serial interface bits: MIXER_RDAC (Register 0x31, Bits[8:5])

and MIXER_CDAC (Register 0x31, Bits[4:0]).

ADRF6620ACPZ-R7 Datasheet(PDF) 31 Page - Analog Devices

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