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ADRF6620ACPZ-R7 Datasheet(PDF) 13 Page - Analog Devices

No. de pieza ADRF6620ACPZ-R7
Descripción Electrónicos  700 MHz to 2700 MHz Rx Mixer with Integrated IF DGA, Fractional-N PLL, and VCO
PDF  52 Pages
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ADRF6620ACPZ-R7 Datasheet(HTML) 13 Page - Analog Devices

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Data Sheet
ADRF6620
Rev. 0 | Page 13 of 52
PHASE-LOCKED LOOP (PLL)
VCCx = 5 V, TA = 25°C, 120 kHz loop filter, fREF = 153.6 MHz, PLL reference amplitude = 4 dBm, fPFD = 38.4 MHz, measured at LO
output, unless otherwise noted.
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OFFSET FREQUENCY (Hz)
Figure 14. VCO2 Open-Loop VCO Phase Noise vs. Offset Frequency;
fVCO2 = 3.4 GHz, LO_DIV_A = 00, VTUNE = 2 V
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OFFSET FREQUENCY (Hz)
Figure 15. VCO1 Open-Loop Phase Noise vs. Offset Frequency;
fVCO1 = 4.6 GHz, LO_DIV_A = 00, VTUNE = 2 V
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OFFSET FREQUENCY (Hz)
Figure 16. VCO0 Open-Loop Phase Noise vs. Offset Frequency;
fVCO0 = 5.5 GHz, LO_DIV_A = 00, VTUNE = 2 V
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OFFSET FREQUENCY (Hz)
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LO_DIV_A = 00
LO_DIV_A = 01
LO_DIV_A = 10
LO_DIV_A = 11
Figure 17. VCO2 Closed-Loop Phase Noise for Various LO_DIV_A Dividers vs.
Offset Frequency; fVCO2 = 3.4 GHz
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OFFSET FREQUENCY (Hz)
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LO_DIV_A = 00
LO_DIV_A = 01
LO_DIV_A = 10
LO_DIV_A = 11
Figure 18. VCO1 Closed-Loop Phase Noise for Various LO_DIV_A Dividers vs.
Offset Frequency; fVCO1 = 4.6 GHz
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100M
OFFSET FREQUENCY (Hz)
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LO_DIV_A = 00
LO_DIV_A = 01
LO_DIV_A = 10
LO_DIV_A = 11
Figure 19. VCO0 Closed-Loop Phase Noise for Various LO_DIV_A Dividers vs.
Offset Frequency; fVCO0 = 5.532 GHz



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