UPD17708 datasheet(245/356 Pages) NEC

245 / 356 page

245

µPD17704, 17705, 17707, 17708, 17709

16.3 Serial Interface 1

16.3.1 Outline of serial interface 1

Figure 16-16 outlines the serial interface 1.

Serial interface 1 is used in the 3-wire serial I/O mode.

Figure 16-16. Outline of Serial Interface 1

SCK1/P0B2

SIO1CK0 and 1 flags

SIO1HIZ flag

Clock I/O

control block

Data I/O

control block

Wait signal

SIO1TS flag

4.5 MHz

Wait control

block

Clock control block

Clock counter

Count value: 8

IRQSIO1 flag

Presettable shift register 1

(SIO1SFR)

SO1/P0B1

SI1/P0B0

OUT

Remarks 1.

SIO1CK1 and SIO1CK0 (bits 1 and 0 of serial I/O1 mode selection register: refer to Figure 16-17)

select a shift clock.

SIO1TS (bit 3 of serial I/O1 mode selection register: refer to Figure 16-17) starts or stops communication

operation.

SIO1HIZ (bit 2 of serial I/O1 mode selection register: refer to Figure 16-17) selects the function of

the SO1/P0B1 pin.

16.3.2 Clock I/O control block and data I/O control block

The clock I/O control block and data I/O control block control the transmission or reception operation of serial

interface 1 and selects a shift clock.

The internal clock (master) or external clock (slave) operation is selected by the SIO1CK0 and 1 flags.

The SIO1HIZ flag selects whether the SO1 pin is used as a serial data output pin.

The flags that control the clock I/O control block and data I/O control block are allocated to the serial I/O1 mode

selection register.

Figure 16-17 shows the configuration and function of the serial I/O1 mode selection register.

Table 16-7 shows the set status of each pin.

As shown in this table, flags that set the input or output mode of each pin must also be manipulated in addition

to the control flags of the serial interface, in order to set each pin .

UPD17708 Datasheet(PDF) 245 Page - NEC

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