ADE7758_15 datasheet(57/72 Pages) AD

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Data Sheet

ADE7758

Rev. E | Page 57 of 72

GLOBAL

INTERRUPT

MASK

ISR RETURN

GLOBAL INTERRUPT

MASK RESET

CLEAR MCU

INTERRUPT

FLAG

READ

STATUS WITH

RESET (0x1A)

ISR ACTION

(BASED ON STATUS CONTENTS)

MCU

INTERRUPT

FLAG SET

PROGRAM

SEQUENCE

JUMP

ISR

JUMP

ISR

IRQ

Figure 87. ADE7758 Interrupt Management

STATUS REGISTER CONTENTS

SCLK

DIN

DOUT

READ STATUS REGISTER COMMAND

DB15

DB8 DB7

DB0

t11

t12

IRQ

Figure 88. ADE7758 Interrupt Timing

COMMUNICATIONS

OUT

ADDRESS

DECODE

DIN

DOUT

Figure 89. Addressing ADE7758 Registers via the Communications Register

The communications register is an 8-bit, write-only register.

The MSB determines whether the next data transfer operation

is a read or a write. The seven LSBs contain the address of the

Figure 90 and Figure 91 show the data transfer sequences for a

read and write operation, respectively.

MULTIBYTE

COMMUNICATIONS REGISTER WRITE

DIN

SCLK

DOUT

READ DATA

ADDRESS

Figure 90. Reading Data from the ADE7758 via the Serial Interface

COMMUNICATIONS REGISTER WRITE

DIN

SCLK

ADDRESS

MULTIBYTE READ DATA

Figure 91. Writing Data to the ADE7758 via the Serial Interface

On completion of a data transfer (read or write), the ADE7758

once again enters into communications mode, that is, the next

instruction followed must be a write to the communications

A data transfer is completed when the LSB of the ADE7758

or from the ADE7758.

SERIAL WRITE OPERATION

The serial write sequence takes place as follows. With the

ADE7758 in communications mode and the CS input logic low,

a write to the communications register takes place first. The

MSB of this byte transfer must be set to 1, indicating that the

next data transfer operation is a write to the register. The seven

LSBs of this byte contain the address of the register to be written

to. The

starts shifting in the register data on the next

falling edge of SCLK. All remaining bits of register data are

shifted in on the falling edge of the subsequent SCLK pulses

(see

ADE7758

Figure 92

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