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CC1021-RTR1 Datasheet(PDF) 29 Page - Texas Instruments

No. de pieza CC1021-RTR1
Descripción Electrónicos  Single Chip Low Power RF Transceiver for Narrowband Systems
PDF  91 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
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CC1021-RTR1 Datasheet(HTML) 29 Page - Texas Instruments

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filter _ clock
RSSI
AGC _ AVG[1:0] 1
f
f
2
+
=
Not Recommended for New Designs NRND
CC1021
www.ti.com
SWRS045D – JANUARY 2006 – REVISED JANUARY 2015
Table 5-6. Typical Receiver Sensitivity as a Function of Data Rate at 433 MHz, FSK Modulation,
BER = 10−3, Pseudo-Random Data (PN9 Sequence)
SENSITIVITY [dBm]
DATA RATE
DEVIATION
FILTER BW
MANCHESTER
[kBaud]
[kHz]
[kHz]
NRZ MODE
UART MODE
MODE
4.8
±4.95
38.4
–109
–112
–109
19.2
±9.9
51.2
–107
–108
–107
19.2
±19.8
102.4
–104
–106
–104
38.4
±19.8
102.4
–104
–104
–104
76.8
±36.0
153.6
–101
–101
–101
153.6
±72.0
307.2
–96
–97
–96
Table 5-7. Typical Receiver Sensitivity as a Function of Data Rate at 868 MHz, FSK Modulation,
BER = 10−3, Pseudo-Random Data (PN9 Sequence)
SENSITIVITY [dBm]
DATA RATE
DEVIATION
FILTER BW
MANCHESTER
[kBaud]
[kHz]
[kHz]
NRZ MODE
UART MODE
MODE
4.8
±4.95
38.4
–108
–111
–108
19.2
±9.9
51.2
–107
–107
–107
19.2
±19.8
102.4
–103
–106
–103
38.4
±19.8
102.4
–103
–103
–103
76.8
±36.0
153.6
–99
–100
–99
153.6
±72.0
307.2
–94
–94
–94
5.9.5
RSSI
CC1021 has a built-in RSSI (Received Signal Strength Indicator) giving a digital value that can be read
form the RSSI register. The RSSI reading must be offset and adjusted for VGA gain setting
(VGA_SETTING[4:0] in the VGA3 register).
The digital RSSI value is ranging from 0 to 106 (7 bits).
The RSSI reading is a logarithmic measure of the average voltage amplitude after the digital filter in the
digital part of the IF chain as shown in Equation 18.
RSSI = 4 log2 (signal amplitude)
(18)
The relative power is then given by RSSI × 1.5 dB in a logarithmic scale.
The number of samples used to calculate the average signal amplitude is controlled by AGC_AVG[1:0] in
the VGA2 register. The RSSI update rate is given by Equation 19.
(19)
Where:
AGC_AVG[1:0] is set in the VGA2 register.
ffilter_clock = 2 × ChBW.
Maximum VGA gain is programmed by the VGA_SETTING[4:0] bits. The VGA gain is programmed in
approximately 3 dB/LSB. The RSSI measurement can be referred to the power (absolute value) at the
RF_IN pin by using Equation 20.
P = 1.5 × RSSI – 3 × VGA_SETTING – RSSI_Offset [dBm]
(20)
The RSSI_Offset depends on the channel filter bandwidth used due to different VGA settings. Figure 5-11
and Figure 5-12 show typical plots of RSSI reading as a function of input power for different channel filter
bandwidths. Refer to Application Note AN030 CC1020/1021 Received Signal Strength Indicator
(SWRA062) for further details.
Copyright © 2006–2015, Texas Instruments Incorporated
Detailed Description
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Product Folder Links: CC1021



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